From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45476) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNSPx-00035g-I7 for qemu-devel@nongnu.org; Wed, 13 Jul 2016 18:14:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bNSPr-0007B9-IB for qemu-devel@nongnu.org; Wed, 13 Jul 2016 18:14:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5522) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bNSPr-0007An-CL for qemu-devel@nongnu.org; Wed, 13 Jul 2016 18:14:03 -0400 From: Bandan Das References: <1467786055-85835-1-git-send-email-imammedo@redhat.com> <1467786055-85835-2-git-send-email-imammedo@redhat.com> Date: Wed, 13 Jul 2016 18:13:59 -0400 In-Reply-To: <1467786055-85835-2-git-send-email-imammedo@redhat.com> (Igor Mammedov's message of "Wed, 6 Jul 2016 08:20:37 +0200") Message-ID: MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Qemu-devel] [PATCH v3 01/19] target-i386: cpu: use uint32_t for X86CPU.apic_id List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: qemu-devel@nongnu.org, pkrempa@redhat.com, ehabkost@redhat.com, mst@redhat.com, armbru@redhat.com, eduardo.otubo@profitbricks.com, marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net I know some of these have already been pulled. I just have some minor questions/comments that shouldn't conflict. Igor Mammedov writes: > Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before > CPU realize) in another way that doesn't use int64_t to detect > if apic-id property has been set. > > Use the fact that 0xFFFFFFFF is the broadcast I noticed this was UINT32_MAX in v2. Why is UINT32_MAX not appropriate ? > value that a CPU can't have and set default > uint32_t apic_id to it instead of using int64_t. > > Later uint32_t apic_id will be used to drop custom > property setter/getter in favor of static property. > > Signed-off-by: Igor Mammedov > --- > target-i386/cpu.c | 4 ++-- > target-i386/cpu.h | 7 ++++++- > 2 files changed, 8 insertions(+), 3 deletions(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 5c69c43..e7319e3 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2883,7 +2883,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > goto out; > } > > - if (cpu->apic_id < 0) { > + if (cpu->apic_id == UNASSIGNED_APIC_ID) { > error_setg(errp, "apic-id property was not initialized properly"); > return; > } > @@ -3154,7 +3154,7 @@ static void x86_cpu_initfn(Object *obj) > > #ifndef CONFIG_USER_ONLY > /* Any code creating new X86CPU objects have to set apic-id explicitly */ > - cpu->apic_id = -1; > + cpu->apic_id = UNASSIGNED_APIC_ID; > #endif > > for (w = 0; w < FEATURE_WORDS; w++) { > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 738958e..00de199 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -835,6 +835,11 @@ typedef struct { > > #define NB_OPMASK_REGS 8 > > +/* CPU can't have 0xFFFFFFFF APIC ID, use that value to distinguish > + * that APIC ID hasn't been set yet > + */ > +#define UNASSIGNED_APIC_ID 0xFFFFFFFF > + > typedef union X86LegacyXSaveArea { > struct { > uint16_t fcw; > @@ -1163,7 +1168,7 @@ struct X86CPU { > bool expose_kvm; > bool migratable; > bool host_features; > - int64_t apic_id; > + uint32_t apic_id; > > /* if true the CPUID code directly forward host cache leaves to the guest */ > bool cache_info_passthrough;