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From: David Edmondson <david.edmondson@oracle.com>
To: zhaolichang <zhaolichang@huawei.com>, qemu-trivial@nongnu.org
Cc: zhaolichang <zhaolichang@huawei.com>, qemu-devel@nongnu.org
Subject: Re: [PATCH RFC 14/14] target/: fix some comment spelling errors
Date: Wed, 30 Sep 2020 11:56:42 +0100	[thread overview]
Message-ID: <m27dsbpm6t.fsf@oracle.com> (raw)
In-Reply-To: <20200930095321.2006-15-zhaolichang@huawei.com>

On Wednesday, 2020-09-30 at 17:53:21 +08, zhaolichang wrote:

> I found that there are many spelling errors in the comments of qemu/target.
> I used spellcheck to check the spelling errors and found some errors in the folder.
>
> Signed-off-by: zhaolichang <zhaolichang@huawei.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  target/openrisc/cpu.h        | 2 +-
>  target/sparc/asi.h           | 2 +-
>  target/unicore32/translate.c | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
> index bd42faf..8ca8605 100644
> --- a/target/openrisc/cpu.h
> +++ b/target/openrisc/cpu.h
> @@ -291,7 +291,7 @@ typedef struct CPUOpenRISCState {
>      int is_counting;
>  
>      uint32_t picmr;         /* Interrupt mask register */
> -    uint32_t picsr;         /* Interrupt contrl register*/
> +    uint32_t picsr;         /* Interrupt control register*/
>  #endif
>      void *irq[32];          /* Interrupt irq input */
>  } CPUOpenRISCState;
> diff --git a/target/sparc/asi.h b/target/sparc/asi.h
> index bb58735..4e9f1d5 100644
> --- a/target/sparc/asi.h
> +++ b/target/sparc/asi.h
> @@ -231,7 +231,7 @@
>  #define ASI_INTR_ID		0x63 /* (CMT) Interrupt ID register	*/
>  #define ASI_CORE_ID		0x63 /* (CMT) LP ID register		*/
>  #define ASI_CESR_ID		0x63 /* (CMT) CESR ID register		*/
> -#define ASI_IC_INSTR		0x66 /* Insn cache instrucion ram diag	*/
> +#define ASI_IC_INSTR		0x66 /* Insn cache instruction ram diag	*/
>  #define ASI_IC_TAG		0x67 /* Insn cache tag/valid ram diag 	*/
>  #define ASI_IC_STAG		0x68 /* (III) Insn cache snoop tag ram	*/
>  #define ASI_IC_PRE_DECODE	0x6e /* Insn cache pre-decode ram diag	*/
> diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c
> index d4b06df..2e91b05 100644
> --- a/target/unicore32/translate.c
> +++ b/target/unicore32/translate.c
> @@ -119,7 +119,7 @@ static void load_reg_var(DisasContext *s, TCGv var, int reg)
>  {
>      if (reg == 31) {
>          uint32_t addr;
> -        /* normaly, since we updated PC */
> +        /* normally, since we updated PC */
>          addr = (long)s->pc;
>          tcg_gen_movi_i32(var, addr);
>      } else {
> -- 
> 2.26.2.windows.1

dme.
-- 
Tell her I'll be waiting, in the usual place.


  parent reply	other threads:[~2020-09-30 11:02 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  9:53 [PATCH RFC 00/14] fix some comment spelling errors zhaolichang
2020-09-30  9:53 ` [PATCH RFC 01/14] cris/: " zhaolichang
2020-09-30 10:49   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 02/14] ppc/: " zhaolichang
2020-09-30 10:50   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 03/14] riscv/: " zhaolichang
2020-09-30 10:51   ` David Edmondson
2020-09-30 15:43   ` Alistair Francis
2020-09-30  9:53 ` [PATCH RFC 04/14] rx/: " zhaolichang
2020-09-30 10:25   ` Philippe Mathieu-Daudé
2020-09-30 10:51   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 05/14] tricore/: " zhaolichang
2020-09-30 10:52   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 06/14] mips/: " zhaolichang
2020-09-30 10:23   ` Philippe Mathieu-Daudé
2020-09-30 10:27     ` Philippe Mathieu-Daudé
2020-09-30 10:52   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 07/14] s390x/: " zhaolichang
2020-09-30 10:53   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 08/14] m68k/: " zhaolichang
2020-09-30 10:26   ` Laurent Vivier
2020-09-30 16:03     ` Philippe Mathieu-Daudé
2020-09-30 16:19       ` Laurent Vivier
2020-09-30 10:54   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 09/14] sh4/: " zhaolichang
2020-09-30 10:24   ` Philippe Mathieu-Daudé
2020-09-30 10:54   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 10/14] i386/: " zhaolichang
2020-09-30 10:55   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 11/14] avr/: " zhaolichang
2020-09-30 10:24   ` Philippe Mathieu-Daudé
2020-09-30 10:55   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 12/14] arm/: " zhaolichang
2020-09-30 10:56   ` David Edmondson
2020-09-30 16:04   ` Philippe Mathieu-Daudé
2020-09-30  9:53 ` [PATCH RFC 13/14] alpha/: " zhaolichang
2020-09-30 10:56   ` David Edmondson
2020-09-30 16:01   ` Philippe Mathieu-Daudé
2020-09-30  9:53 ` [PATCH RFC 14/14] target/: " zhaolichang
2020-09-30 10:25   ` Philippe Mathieu-Daudé
2020-09-30 10:56   ` David Edmondson [this message]
2020-09-30 10:28 ` [PATCH RFC 00/14] " Philippe Mathieu-Daudé

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