qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: David Edmondson <david.edmondson@oracle.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>, qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
	"Stephen Checkoway" <stephen.checkoway@oberlin.edu>,
	qemu-block@nongnu.org, "Max Reitz" <mreitz@redhat.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: Re: [PATCH 9/9] hw/block/pflash_cfi01: Extract pflash_mode_read_array()
Date: Wed, 10 Mar 2021 11:05:13 +0000	[thread overview]
Message-ID: <m2ft13fevq.fsf@oracle.com> (raw)
In-Reply-To: <20210309235028.912078-10-philmd@redhat.com>

On Wednesday, 2021-03-10 at 00:50:28 +01, Philippe Mathieu-Daudé wrote:

> The same pattern is used when setting the flash in READ_ARRAY mode:
> - Set the state machine command to READ_ARRAY
> - Reset the write_cycle counter
> - Reset the memory region in ROMD
>
> Refactor the current code by extracting this pattern.
> It is used three times:
>
> - On a read access (on invalid command).
>
> - On a write access (on command failure, error, or explicitly asked)
>
> - When the device is initialized. Here the ROMD mode is hidden
>   by the memory_region_init_rom_device() call.
>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  hw/block/pflash_cfi01.c | 40 +++++++++++++++++-----------------------
>  1 file changed, 17 insertions(+), 23 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index 2618e00926d..32c9b289715 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -115,6 +115,19 @@ static const VMStateDescription vmstate_pflash = {
>      }
>  };
>  
> +static void pflash_mode_read_array(PFlashCFI01 *pfl)
> +{
> +    trace_pflash_mode_read_array();
> +    /*
> +     * The command 0x00 is not assigned by the CFI open standard,
> +     * but QEMU historically uses it for the READ_ARRAY command (0xff).
> +     */
> +    trace_pflash_mode_read_array();
> +    pfl->cmd = 0x00;
> +    pfl->wcycle = 0;
> +    memory_region_rom_device_set_romd(&pfl->mem, true);
> +}
> +
>  /*
>   * Perform a CFI query based on the bank width of the flash.
>   * If this code is called we know we have a device_width set for
> @@ -283,12 +296,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
>      default:
>          /* This should never happen : reset state & treat it as a read */
>          DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd);
> -        pfl->wcycle = 0;
> -        /*
> -         * The command 0x00 is not assigned by the CFI open standard,
> -         * but QEMU historically uses it for the READ_ARRAY command (0xff).
> -         */
> -        pfl->cmd = 0x00;
> +        pflash_mode_read_array(pfl);
>          /* fall through to read code */
>      case 0x00: /* This model reset value for READ_ARRAY (not CFI compliant) */
>          /* Flash area read */
> @@ -663,10 +671,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
>                    "\n", __func__, offset, pfl->wcycle, pfl->cmd, value);
>  
>   mode_read_array:
> -    trace_pflash_mode_read_array();
> -    memory_region_rom_device_set_romd(&pfl->mem, true);
> -    pfl->wcycle = 0;
> -    pfl->cmd = 0x00; /* This model reset value for READ_ARRAY (not CFI) */
> +    pflash_mode_read_array(pfl);
>  }
>  
>  
> @@ -872,13 +877,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
>          pfl->max_device_width = pfl->device_width;
>      }
>  
> -    pfl->wcycle = 0;
> -    /*
> -     * The command 0x00 is not assigned by the CFI open standard,
> -     * but QEMU historically uses it for the READ_ARRAY command (0xff).
> -     */
> -    pfl->cmd = 0x00;
>      pfl->status = 0x80; /* WSM ready */
> +    pflash_mode_read_array(pfl);
>      pflash_cfi01_fill_cfi_table(pfl);
>  }
>  
> @@ -887,13 +887,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev)
>      PFlashCFI01 *pfl = PFLASH_CFI01(dev);
>  
>      trace_pflash_reset();
> -    /*
> -     * The command 0x00 is not assigned by the CFI open standard,
> -     * but QEMU historically uses it for the READ_ARRAY command (0xff).
> -     */
> -    pfl->cmd = 0x00;
> -    pfl->wcycle = 0;
> -    memory_region_rom_device_set_romd(&pfl->mem, true);
> +    pflash_mode_read_array(pfl);
>      /*
>       * The WSM ready timer occurs at most 150ns after system reset.
>       * This model deliberately ignores this delay.
> -- 
> 2.26.2

dme.
-- 
Would you offer your throat to the wolf with the red roses?


      reply	other threads:[~2021-03-10 11:07 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09 23:50 [PATCH 0/9] hw/block/pflash: Refactors around setting the device in read-array mode Philippe Mathieu-Daudé
2021-03-09 23:50 ` [PATCH 1/9] hw/block/pflash_cfi: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10  9:30   ` David Edmondson
2021-03-09 23:50 ` [PATCH 2/9] hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table() Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10  9:31   ` David Edmondson
2021-03-09 23:50 ` [PATCH 3/9] hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table() Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10 10:53   ` David Edmondson
2021-03-09 23:50 ` [PATCH 4/9] hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings() Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10 10:58   ` David Edmondson
2021-03-10 16:34     ` Philippe Mathieu-Daudé
2021-03-09 23:50 ` [PATCH 5/9] hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=false) Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-09 23:50 ` [PATCH 6/9] hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10 10:59   ` David Edmondson
2021-03-10 16:31     ` Philippe Mathieu-Daudé
2021-03-10 16:34       ` Philippe Mathieu-Daudé
2021-03-09 23:50 ` [PATCH 7/9] hw/block/pflash_cfi02: Factor out DeviceReset method Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10 16:44     ` Philippe Mathieu-Daudé
2021-03-10 11:01   ` David Edmondson
2021-03-09 23:50 ` [PATCH 8/9] hw/block/pflash_cfi01: Clarify trace events Philippe Mathieu-Daudé
2021-03-10  8:48   ` Bin Meng
2021-03-10 11:01   ` David Edmondson
2021-03-09 23:50 ` [PATCH 9/9] hw/block/pflash_cfi01: Extract pflash_mode_read_array() Philippe Mathieu-Daudé
2021-03-10 11:05   ` David Edmondson [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=m2ft13fevq.fsf@oracle.com \
    --to=david.edmondson@oracle.com \
    --cc=alistair.francis@wdc.com \
    --cc=kwolf@redhat.com \
    --cc=mreitz@redhat.com \
    --cc=philmd@redhat.com \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=stephen.checkoway@oberlin.edu \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).