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From: David Edmondson <david.edmondson@oracle.com>
To: zhaolichang <zhaolichang@huawei.com>, qemu-trivial@nongnu.org
Cc: zhaolichang <zhaolichang@huawei.com>, qemu-devel@nongnu.org
Subject: Re: [PATCH RFC 08/14] m68k/: fix some comment spelling errors
Date: Wed, 30 Sep 2020 11:54:04 +0100	[thread overview]
Message-ID: <m2o8lnpmb7.fsf@oracle.com> (raw)
In-Reply-To: <20200930095321.2006-9-zhaolichang@huawei.com>

On Wednesday, 2020-09-30 at 17:53:15 +08, zhaolichang wrote:

> I found that there are many spelling errors in the comments of qemu/target/m68k.
> I used spellcheck to check the spelling errors and found some errors in the folder.
>
> Signed-off-by: zhaolichang <zhaolichang@huawei.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  target/m68k/translate.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index 3fc67aa..133a404 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -438,7 +438,7 @@ static TCGv gen_addr_index(DisasContext *s, uint16_t ext, TCGv tmp)
>  }
>  
>  /*
> - * Handle a base + index + displacement effective addresss.
> + * Handle a base + index + displacement effective address.
>   * A NULL_QREG base means pc-relative.
>   */
>  static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
> @@ -1696,7 +1696,7 @@ static void bcd_add(TCGv dest, TCGv src)
>  
>      /*
>       * t1 = (src + 0x066) + dest + X
> -     *    = result with some possible exceding 0x6
> +     *    = result with some possible exceeding 0x6
>       */
>  
>      t0 = tcg_const_i32(0x066);
> @@ -1706,7 +1706,7 @@ static void bcd_add(TCGv dest, TCGv src)
>      tcg_gen_add_i32(t1, t0, dest);
>      tcg_gen_add_i32(t1, t1, QREG_CC_X);
>  
> -    /* we will remove exceding 0x6 where there is no carry */
> +    /* we will remove exceeding 0x6 where there is no carry */
>  
>      /*
>       * t0 = (src + 0x0066) ^ dest
> @@ -1736,7 +1736,7 @@ static void bcd_add(TCGv dest, TCGv src)
>      tcg_temp_free(t0);
>  
>      /*
> -     * remove the exceding 0x6
> +     * remove the exceeding 0x6
>       * for digits that have not generated a carry
>       */
>  
> @@ -2638,7 +2638,7 @@ DISAS_INSN(negx)
>      gen_flush_flags(s); /* compute old Z */
>  
>      /*
> -     * Perform substract with borrow.
> +     * Perform subtract with borrow.
>       * (X, N) =  -(src + X);
>       */
>  
> @@ -2653,7 +2653,7 @@ DISAS_INSN(negx)
>      /*
>       * Compute signed-overflow for negation.  The normal formula for
>       * subtraction is (res ^ src) & (src ^ dest), but with dest==0
> -     * this simplies to res & src.
> +     * this simplifies to res & src.
>       */
>  
>      tcg_gen_and_i32(QREG_CC_V, QREG_CC_N, src);
> @@ -3159,7 +3159,7 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize)
>      gen_flush_flags(s); /* compute old Z */
>  
>      /*
> -     * Perform substract with borrow.
> +     * Perform subtract with borrow.
>       * (X, N) = dest - (src + X);
>       */
>  
> @@ -3169,7 +3169,7 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize)
>      gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1);
>      tcg_gen_andi_i32(QREG_CC_X, QREG_CC_X, 1);
>  
> -    /* Compute signed-overflow for substract.  */
> +    /* Compute signed-overflow for subtract.  */
>  
>      tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, dest);
>      tcg_gen_xor_i32(tmp, dest, src);
> -- 
> 2.26.2.windows.1

dme.
-- 
Don't you know you're never going to get to France.


  parent reply	other threads:[~2020-09-30 10:57 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  9:53 [PATCH RFC 00/14] fix some comment spelling errors zhaolichang
2020-09-30  9:53 ` [PATCH RFC 01/14] cris/: " zhaolichang
2020-09-30 10:49   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 02/14] ppc/: " zhaolichang
2020-09-30 10:50   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 03/14] riscv/: " zhaolichang
2020-09-30 10:51   ` David Edmondson
2020-09-30 15:43   ` Alistair Francis
2020-09-30  9:53 ` [PATCH RFC 04/14] rx/: " zhaolichang
2020-09-30 10:25   ` Philippe Mathieu-Daudé
2020-09-30 10:51   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 05/14] tricore/: " zhaolichang
2020-09-30 10:52   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 06/14] mips/: " zhaolichang
2020-09-30 10:23   ` Philippe Mathieu-Daudé
2020-09-30 10:27     ` Philippe Mathieu-Daudé
2020-09-30 10:52   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 07/14] s390x/: " zhaolichang
2020-09-30 10:53   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 08/14] m68k/: " zhaolichang
2020-09-30 10:26   ` Laurent Vivier
2020-09-30 16:03     ` Philippe Mathieu-Daudé
2020-09-30 16:19       ` Laurent Vivier
2020-09-30 10:54   ` David Edmondson [this message]
2020-09-30  9:53 ` [PATCH RFC 09/14] sh4/: " zhaolichang
2020-09-30 10:24   ` Philippe Mathieu-Daudé
2020-09-30 10:54   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 10/14] i386/: " zhaolichang
2020-09-30 10:55   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 11/14] avr/: " zhaolichang
2020-09-30 10:24   ` Philippe Mathieu-Daudé
2020-09-30 10:55   ` David Edmondson
2020-09-30  9:53 ` [PATCH RFC 12/14] arm/: " zhaolichang
2020-09-30 10:56   ` David Edmondson
2020-09-30 16:04   ` Philippe Mathieu-Daudé
2020-09-30  9:53 ` [PATCH RFC 13/14] alpha/: " zhaolichang
2020-09-30 10:56   ` David Edmondson
2020-09-30 16:01   ` Philippe Mathieu-Daudé
2020-09-30  9:53 ` [PATCH RFC 14/14] target/: " zhaolichang
2020-09-30 10:25   ` Philippe Mathieu-Daudé
2020-09-30 10:56   ` David Edmondson
2020-09-30 10:28 ` [PATCH RFC 00/14] " Philippe Mathieu-Daudé

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