From: Andreas Schwab <schwab@linux-m68k.org>
To: Laurent Vivier <laurent@vivier.eu>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] Re: [PATCH 1/3] m68k: allow fpu to manage double single data type.
Date: Sun, 31 May 2009 14:03:27 +0200 [thread overview]
Message-ID: <m2tz31h434.fsf@igel.home> (raw)
In-Reply-To: <1243731021-23692-2-git-send-email-laurent@vivier.eu> (Laurent Vivier's message of "Sun, 31 May 2009 02:50:19 +0200")
Laurent Vivier <laurent@vivier.eu> writes:
> + if ((insn & 7) == 4) {
> + src = gen_load64(s, tcg_const_i32(s->pc));
> + s->pc += 8;
This is wrong, it doesn't check that this is indeed a 7.4 addressing
mode, but will match any other mode with register 4.
> + case 7:
> + offset = ldsw_code(s->pc);
> + offset += s->pc - 2;
> + s->pc += 2;
> + tcg_gen_addi_i32(tmp32, tmp32, offset);
> + break;
Btw, this is still broken, pc-rel addressing surely does not want the
contents of register a2 added in (and the 68k supports all the indexed
modes as well). All non-immediate addresses should probably be handled
by gen_lea.
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
next prev parent reply other threads:[~2009-05-31 12:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-31 0:50 [Qemu-devel] [PATCH 0/3] m68k: Some FPU enhancements Laurent Vivier
2009-05-31 0:50 ` [Qemu-devel] [PATCH 1/3] m68k: allow fpu to manage double single data type Laurent Vivier
2009-05-31 0:50 ` [Qemu-devel] [PATCH 2/3] m68k: add FScc instruction Laurent Vivier
2009-05-31 0:50 ` [Qemu-devel] [PATCH 3/3] m68k: add single data type to gen_ea Laurent Vivier
2009-05-31 12:03 ` Andreas Schwab [this message]
2009-05-31 12:57 ` [Qemu-devel] Re: [PATCH 1/3] m68k: allow fpu to manage double single data type Laurent Vivier
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