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From: Andreas Schwab <schwab@linux-m68k.org>
References: <1243731021-23692-1-git-send-email-laurent@vivier.eu>
	<1243731021-23692-2-git-send-email-laurent@vivier.eu>
Date: Sun, 31 May 2009 14:03:27 +0200
In-Reply-To: <1243731021-23692-2-git-send-email-laurent@vivier.eu> (Laurent
	Vivier's message of "Sun, 31 May 2009 02:50:19 +0200")
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Subject: [Qemu-devel] Re: [PATCH 1/3] m68k: allow fpu to manage double
	single data type.
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To: Laurent Vivier <laurent@vivier.eu>
Cc: qemu-devel@nongnu.org

Laurent Vivier <laurent@vivier.eu> writes:

> +            if ((insn & 7) == 4) {
> +                src = gen_load64(s, tcg_const_i32(s->pc));
> +                s->pc += 8;

This is wrong, it doesn't check that this is indeed a 7.4 addressing
mode, but will match any other mode with register 4.

> +                case 7:
> +                    offset = ldsw_code(s->pc);
> +                    offset += s->pc - 2;
> +                    s->pc += 2;
> +                    tcg_gen_addi_i32(tmp32, tmp32, offset);
> +                    break;

Btw, this is still broken, pc-rel addressing surely does not want the
contents of register a2 added in (and the 68k supports all the indexed
modes as well).  All non-immediate addresses should probably be handled
by gen_lea.

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."