[Qemu-devel] QEMU 0.5.3 release

[Qemu-devel] QEMU 0.5.3 release

[Fabrice Bellard]

Hi,

QEMU 0.5.3 is available at http://bellard.org/qemu/.

Changelog:

version 0.5.3:

   - added Bochs VESA VBE support
   - VGA memory map mode 3 access fix (OS/2 install fix)
   - IDE fixes (Jens Axboe)
   - CPU interrupt fixes
   - fixed various TLB invalidation cases (NT install)
   - fixed cr0.WP semantics (XP install)
   - direct chaining support for SPARC and PowerPC (faster)
   - ARM NWFPE support (initial patch by Ulrich Hecht)
   - added specific x86 to x86 translator (close to native performance
     in qemu-i386 and qemu-fast)
   - shm syscalls support (Paul McKerras)
   - added accurate CR0.MP/ME/TS emulation
   - fixed DMA memory write access (Win95 boot floppy fix)
   - graphical x86 linux loader
   - command line monitor
   - generic removable device support
   - support of CD-ROM change
   - multiple network interface support
   - initial x86-64 host support (Gwenole Beauchesne)
   - lret to outer priviledge fix (OS/2 install fix)
   - task switch fixes (SkyOS boot)
   - VM save/restore commands
   - new timer API
   - more precise RTC emulation (periodic timers + time updates)
   - Win32 port (initial patch by Kazu)

Fabrice.

Re: [Qemu-devel] QEMU 0.5.3 release

[Rudi Lippert]

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Hash: SHA1

funny. as soon as fabrice drops a release, it gets REALLY quiet on this list.
everybody must be busy testing.
while my vm is installing, i use the time to say
THANK YOU
great work!

cheers,
Rudi

Am Sonntag, 4. April 2004 17:41 schrieb Fabrice Bellard:
> Hi,
>
> QEMU 0.5.3 is available at http://bellard.org/qemu/.
>
> Changelog:
>
> version 0.5.3:
>
>    - added Bochs VESA VBE support
>    - VGA memory map mode 3 access fix (OS/2 install fix)
>    - IDE fixes (Jens Axboe)
>    - CPU interrupt fixes
>    - fixed various TLB invalidation cases (NT install)
>    - fixed cr0.WP semantics (XP install)
>    - direct chaining support for SPARC and PowerPC (faster)
>    - ARM NWFPE support (initial patch by Ulrich Hecht)
>    - added specific x86 to x86 translator (close to native performance
>      in qemu-i386 and qemu-fast)
>    - shm syscalls support (Paul McKerras)
>    - added accurate CR0.MP/ME/TS emulation
>    - fixed DMA memory write access (Win95 boot floppy fix)
>    - graphical x86 linux loader
>    - command line monitor
>    - generic removable device support
>    - support of CD-ROM change
>    - multiple network interface support
>    - initial x86-64 host support (Gwenole Beauchesne)
>    - lret to outer priviledge fix (OS/2 install fix)
>    - task switch fixes (SkyOS boot)
>    - VM save/restore commands
>    - new timer API
>    - more precise RTC emulation (periodic timers + time updates)
>    - Win32 port (initial patch by Kazu)
>
> Fabrice.
>
>
>
> _______________________________________________
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://mail.nongnu.org/mailman/listinfo/qemu-devel
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Re: [Qemu-devel] QEMU 0.5.3 release

[Herbert Poetzl]

On Sun, Apr 04, 2004 at 05:41:39PM +0200, Fabrice Bellard wrote:
> Hi,
> 
> QEMU 0.5.3 is available at http://bellard.org/qemu/.

hmm, and I have the first issues ...

 # qemu-0.5.3/i386/qemu-fast -nographic -L qemu-0.5.3/pc-bios -m 128 -snapshot -hda IMGs/TEST_32M.img -hdb IMGs/TEST_256M.img -kernel linux-2.6.5-vs1.9.0pre1-XB/arch/i386/boot/bzImage -append "rw root=/dev/hda1"

ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
hda: QEMU HARDDISK, ATA DISK drive
hdc: QEMU CD-ROM, ATAPI CD/DVD-ROM drive
Using anticipatory io scheduler
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
ide1 at 0x170-0x177,0x376 on irq 15
hda: max request size: 128KiB
hda: 65537 sectors (33 MB) w/256KiB Cache, CHS=65/16/63
 /dev/ide/host0/bus0/target0/lun0:<4>hda: set_multmode: status=0x41 { DriveReady Error }
hda: set_multmode: error=0x04 { DriveStatusError }

...

VFS: Cannot open root device "hda1" or hda1
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on hda1
 <4>Losing too many ticks!
TSC cannot be used as a timesource.  <4>Possible reasons for this are:
  You're running with Speedstep,
  You don't have DMA enabled for your hard disk (see hdparm),
  Incorrect TSC synchronization on an SMP system (see dmesg).
Falling back to a sane timesource now.

where 0.5.2 with the same options gives ...

ide: Assuming 50MHz system bus speed for PIO modes; override with idebus=xx
hda: QEMU HARDDISK, ATA DISK drive
hdb: QEMU HARDDISK, ATA DISK drive

hda: 65537 sectors (33 MB) w/256KiB Cache, CHS=65/16/63
 /dev/ide/host0/bus0/target0/lun0:<4>hda: set_multmode: status=0x41 { DriveReady Error }
hda: set_multmode: error=0x04 { DriveStatusError }
 p1
hdb: max request size: 128KiB
hdb: 524289 sectors (268 MB) w/256KiB Cache, CHS=520/16/63
 /dev/ide/host0/bus0/target1/lun0:<4>hdb: set_multmode: status=0x41 { DriveReady Error }
hdb: set_multmode: error=0x04 { DriveStatusError }
 p1

and everything works fine ...


if you need any additional info, please let me know ...

TIA,
Herbert


> Changelog:
> 
> version 0.5.3:
> 
>   - added Bochs VESA VBE support
>   - VGA memory map mode 3 access fix (OS/2 install fix)
>   - IDE fixes (Jens Axboe)
>   - CPU interrupt fixes
>   - fixed various TLB invalidation cases (NT install)
>   - fixed cr0.WP semantics (XP install)
>   - direct chaining support for SPARC and PowerPC (faster)
>   - ARM NWFPE support (initial patch by Ulrich Hecht)
>   - added specific x86 to x86 translator (close to native performance
>     in qemu-i386 and qemu-fast)
>   - shm syscalls support (Paul McKerras)
>   - added accurate CR0.MP/ME/TS emulation
>   - fixed DMA memory write access (Win95 boot floppy fix)
>   - graphical x86 linux loader
>   - command line monitor
>   - generic removable device support
>   - support of CD-ROM change
>   - multiple network interface support
>   - initial x86-64 host support (Gwenole Beauchesne)
>   - lret to outer priviledge fix (OS/2 install fix)
>   - task switch fixes (SkyOS boot)
>   - VM save/restore commands
>   - new timer API
>   - more precise RTC emulation (periodic timers + time updates)
>   - Win32 port (initial patch by Kazu)
> 
> Fabrice.
> 
> 
> 
> _______________________________________________
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://mail.nongnu.org/mailman/listinfo/qemu-devel

Re: [Qemu-devel] QEMU 0.5.3 release

[Martin Garton]

On Sun, 4 Apr 2004, Fabrice Bellard wrote:

>    - initial x86-64 host support (Gwenole Beauchesne)

Does this mean it will soon be possible to compile and run qemu on amd64
emulating x86?

Or is there still a lot to do?

Regards,
Martin.

Re: [Qemu-devel] QEMU 0.5.3 release

[Fabrice Bellard]

Martin Garton wrote:
> On Sun, 4 Apr 2004, Fabrice Bellard wrote:
> 
> 
>>   - initial x86-64 host support (Gwenole Beauchesne)
> 
> 
> Does this mean it will soon be possible to compile and run qemu on amd64
> emulating x86?
> 
> Or is there still a lot to do?

Thanks to Gwenole, all is there to make it work, but I don't have access 
to an amd64 system, so I cannot test anything...

Fabrice.

Re: [Qemu-devel] QEMU 0.5.3 release

[J. Mayer]

On Tue, 2004-04-13 at 18:00, Martin Garton wrote:
> On Sun, 4 Apr 2004, Fabrice Bellard wrote:
> 
> >    - initial x86-64 host support (Gwenole Beauchesne)
> 
> Does this mean it will soon be possible to compile and run qemu on amd64
> emulating x86?
> 
> Or is there still a lot to do?

There are some assumptions in softmmu that addresses are 32 bits long. I
sent a patch to Fabrice to handle those problems:
I'm now able to launch PPC system emulation on an Athlon64.
I cannot test user emulation, for now, because it doesn't link. It seems
that the linker script assumes to be on an opteron, not an Athlon64 (the
Athlon64 MMU is only 48 bits...) but I didn't tried to fix it for now.

Regards.

-- 
J. Mayer <l_indien@magic.fr>
Never organized

Re: [Qemu-devel] QEMU 0.5.3 release

[art yerkes]

[-- Attachment #1: Type: text/plain, Size: 1544 bytes --]

On Sun, 18 Apr 2004 19:58:03 +0200
"J. Mayer" <l_indien@magic.fr> wrote:

> On Tue, 2004-04-13 at 18:00, Martin Garton wrote:
> > On Sun, 4 Apr 2004, Fabrice Bellard wrote:
> > 
> > >    - initial x86-64 host support (Gwenole Beauchesne)
> > 
> > Does this mean it will soon be possible to compile and run qemu on amd64
> > emulating x86?
> > 
> > Or is there still a lot to do?
> 
> There are some assumptions in softmmu that addresses are 32 bits long. I
> sent a patch to Fabrice to handle those problems:
> I'm now able to launch PPC system emulation on an Athlon64.
> I cannot test user emulation, for now, because it doesn't link. It seems
> that the linker script assumes to be on an opteron, not an Athlon64 (the
> Athlon64 MMU is only 48 bits...) but I didn't tried to fix it for now.

It turns out that the mmu assumption is fairly easy to fix...  Basically,
since qemu uses addend in the tlb struct to address either a host or guest
address, addend must be void *, along with everything in its path.

This patch allows the mmu to succeed, but the actual instructions have the
same problem (32 bit host address assumption).  More work is needed for
full support.  Maybe we and other interested users can help make this work.
On my amd64, I can use qemu compiled 32bit, but there seem to be bugs
initializing the virtual ethernet, which I need.
-- 
IBM had little or no expertise on Intel processors.
 -- paragraph 54, SCO v IBM, second amended complaint
No matter how cynical you become, it's never enough to keep up.
 -- Lily Tomlin

[-- Attachment #2: qemu.diff --]
[-- Type: application/octet-stream, Size: 7697 bytes --]

? arm-user
? config-host.h
? config-host.mak
? dyngen
? i386
? i386-softmmu
? i386-user
? ppc-user
? qemu-doc.html
? qemu-mkcow
? qemu-tech.html
? qemu.1
? qemu.diff
? sparc-user
Index: Makefile.target
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile.target,v
retrieving revision 1.25
diff -u -r1.25 Makefile.target
--- Makefile.target	12 Apr 2004 20:39:28 -0000	1.25
+++ Makefile.target	19 Apr 2004 13:04:29 -0000
@@ -5,9 +5,9 @@
 DEFINES=-I. -I$(TARGET_PATH) -I$(SRC_PATH)
 ifdef CONFIG_USER_ONLY
 VPATH+=:$(SRC_PATH)/linux-user
-DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH)
+DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH) -DDEBUG_MMU
 endif
-CFLAGS=-Wall -O2 -g
+CFLAGS=-Wall -g -ffixed-rbp
 LDFLAGS=-g
 LIBS=
 HELPER_CFLAGS=$(CFLAGS)
Index: cpu-defs.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-defs.h,v
retrieving revision 1.5
diff -u -r1.5 cpu-defs.h
--- cpu-defs.h	21 Mar 2004 17:06:25 -0000	1.5
+++ cpu-defs.h	19 Apr 2004 13:04:29 -0000
@@ -66,7 +66,8 @@
     */
     uint32_t address; 
     /* addend to virtual address to get physical address */
-    uint32_t addend; 
+    /* Note: The physical address may be in host space */
+    char *addend; 
 } CPUTLBEntry;
 
 #endif
Index: dyngen-exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen-exec.h,v
retrieving revision 1.10
diff -u -r1.10 dyngen-exec.h
--- dyngen-exec.h	21 Mar 2004 17:06:25 -0000	1.10
+++ dyngen-exec.h	19 Apr 2004 13:04:29 -0000
@@ -25,12 +25,16 @@
 typedef unsigned char uint8_t;
 typedef unsigned short uint16_t;
 typedef unsigned int uint32_t;
+#if !defined(__x86_64__)
 typedef unsigned long long uint64_t;
+#endif
 
 typedef signed char int8_t;
 typedef signed short int16_t;
 typedef signed int int32_t;
+#if !defined(__x86_64__)
 typedef signed long long int64_t;
+#endif
 
 #define INT8_MIN		(-128)
 #define INT16_MIN		(-32767-1)
@@ -45,9 +49,15 @@
 #define UINT32_MAX		(4294967295U)
 #define UINT64_MAX		((uint64_t)(18446744073709551615))
 
+#ifndef __FILE__DEF
+#if 0
 typedef struct FILE FILE;
 extern int fprintf(FILE *, const char *, ...);
 extern int printf(const char *, ...);
+#else
+#include <stdio.h>
+#endif
+#endif/*__FILE__DEF*/
 #undef NULL
 #define NULL 0
 #include <fenv.h>
Index: exec-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-all.h,v
retrieving revision 1.17
diff -u -r1.17 exec-all.h
--- exec-all.h	12 Apr 2004 20:39:28 -0000	1.17
+++ exec-all.h	19 Apr 2004 13:04:29 -0000
@@ -32,7 +32,7 @@
 #define __builtin_expect(x, n) (x)
 #endif
 
-#ifdef __i386__
+#if defined(__i386__) && !defined(__x86_64__)
 #define REGPARM(n) __attribute((regparm(n)))
 #else
 #define REGPARM(n)
Index: exec.c
===================================================================
RCS file: /cvsroot/qemu/qemu/exec.c,v
retrieving revision 1.30
diff -u -r1.30 exec.c
--- exec.c	12 Apr 2004 20:39:28 -0000	1.30
+++ exec.c	19 Apr 2004 13:04:29 -0000
@@ -1342,7 +1342,8 @@
     target_ulong pd;
     TranslationBlock *first_tb;
     unsigned int index;
-    target_ulong address, addend;
+    target_ulong address;
+    char *addend;
     int ret;
 
     p = page_find(paddr >> TARGET_PAGE_BITS);
@@ -1370,7 +1371,7 @@
         } else {
             /* standard memory */
             address = vaddr;
-            addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);
+            addend = (void *)phys_ram_base + (pd & TARGET_PAGE_MASK);
         }
         
         index = (vaddr >> 12) & (CPU_TLB_SIZE - 1);
Index: softmmu_header.h
===================================================================
RCS file: /cvsroot/qemu/qemu/softmmu_header.h,v
retrieving revision 1.6
diff -u -r1.6 softmmu_header.h
--- softmmu_header.h	4 Jan 2004 23:56:24 -0000	1.6
+++ softmmu_header.h	19 Apr 2004 13:04:29 -0000
@@ -122,7 +122,7 @@
                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                   "i" (CPU_MEM_INDEX),
                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
-                  : "%eax", "%ecx", "%edx", "memory", "cc");
+                  : "%eax", "%ecx", "%edx", "memory", "cc");    
     return res;
 }
 
Index: softmmu_template.h
===================================================================
RCS file: /cvsroot/qemu/qemu/softmmu_template.h,v
retrieving revision 1.7
diff -u -r1.7 softmmu_template.h
--- softmmu_template.h	6 Feb 2004 19:46:14 -0000	1.7
+++ softmmu_template.h	19 Apr 2004 13:04:29 -0000
@@ -17,6 +17,12 @@
  * License along with this library; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+
+#ifndef __FILE__DEF
+#define __FILE__DEF
+#include <stdio.h>
+#endif/*__FILE__DEF*/
+
 #define DATA_SIZE (1 << SHIFT)
 
 #if DATA_SIZE == 8
@@ -94,8 +100,8 @@
 {
     DATA_TYPE res;
     int index;
-    unsigned long physaddr, tlb_addr;
-    void *retaddr;
+    unsigned long tlb_addr;
+    void *retaddr, *physaddr;
     
     /* test if there is match for unaligned or IO access */
     /* XXX: could done more in memory macro in a non portable way */
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.59
diff -u -r1.59 vl.c
--- vl.c	12 Apr 2004 20:39:28 -0000	1.59
+++ vl.c	19 Apr 2004 13:04:29 -0000
@@ -358,7 +358,20 @@
     return val;
 }
 
+#elif defined(__x86_64__)
+
+int64_t cpu_get_real_ticks(void)
+{
+    uint32_t low,high;
+    int64_t val;
+    asm volatile("rdtsc" : "=a" (low), "=d" (high));
+    val = high;
+    val <<= 32;
+    val |= low;
+    return val;
+}
+
 #else
 #error unsupported CPU
 #endif
Index: target-i386/exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/target-i386/exec.h,v
retrieving revision 1.10
diff -u -r1.10 exec.h
--- target-i386/exec.h	26 Mar 2004 22:26:53 -0000	1.10
+++ target-i386/exec.h	19 Apr 2004 13:04:29 -0000
@@ -19,52 +19,60 @@
  */
 #include "dyngen-exec.h"
 
+#ifdef __x86_64__
+#define REGISTER
+#define AREGASM(x)
+#else
+#define REGISTER register
+#define AREGASM(x) asm(x)
+#endif
+
 /* at least 4 register variables are defines */
-register struct CPUX86State *env asm(AREG0);
-register uint32_t T0 asm(AREG1);
-register uint32_t T1 asm(AREG2);
-register uint32_t T2 asm(AREG3);
+REGISTER struct CPUX86State *env;
+REGISTER uint32_t T0 AREGASM(AREG1);
+REGISTER uint32_t T1 AREGASM(AREG2);
+REGISTER uint32_t T2 AREGASM(AREG3);
 
 #define A0 T2
 
 /* if more registers are available, we define some registers too */
 #ifdef AREG4
-register uint32_t EAX asm(AREG4);
+REGISTER uint32_t EAX AREGASM(AREG4);
 #define reg_EAX
 #endif
 
 #ifdef AREG5
-register uint32_t ESP asm(AREG5);
+REGISTER uint32_t ESP AREGASM(AREG5);
 #define reg_ESP
 #endif
 
 #ifdef AREG6
-register uint32_t EBP asm(AREG6);
+REGISTER uint32_t EBP AREGASM(AREG6);
 #define reg_EBP
 #endif
 
 #ifdef AREG7
-register uint32_t ECX asm(AREG7);
+REGISTER uint32_t ECX AREGASM(AREG7);
 #define reg_ECX
 #endif
 
 #ifdef AREG8
-register uint32_t EDX asm(AREG8);
+REGISTER uint32_t EDX AREGASM(AREG8);
 #define reg_EDX
 #endif
 
 #ifdef AREG9
-register uint32_t EBX asm(AREG9);
+REGISTER uint32_t EBX AREGASM(AREG9);
 #define reg_EBX
 #endif
 
 #ifdef AREG10
-register uint32_t ESI asm(AREG10);
+REGISTER uint32_t ESI AREGASM(AREG10);
 #define reg_ESI
 #endif
 
 #ifdef AREG11
-register uint32_t EDI asm(AREG11);
+REGISTER uint32_t EDI AREGASM(AREG11);
 #define reg_EDI
 #endif
 

Re: [Qemu-devel] QEMU 0.5.3 release

[Jean-Michel POURE]

Le lundi 19 Avril 2004 15:04, art yerkes a écrit :
> On my amd64, I can use qemu compiled 32bit, but there seem to be bugs
> initializing the virtual ethernet, which I need.

Under Win32 guest, you may need Renzo patch sent to the list:
http://mail.gnu.org/archive/html/qemu-devel/2004-03/msg00202.html

Cheers, Jean-Michel

Re: [Qemu-devel] QEMU 0.5.3 release

[art yerkes]

On Mon, 19 Apr 2004 16:42:40 +0200
Jean-Michel POURE <jm@poure.com> wrote:

> Le lundi 19 Avril 2004 15:04, art yerkes a écrit :
> > On my amd64, I can use qemu compiled 32bit, but there seem to be bugs
> > initializing the virtual ethernet, which I need.
> 
> Under Win32 guest, you may need Renzo patch sent to the list:
> http://mail.gnu.org/archive/html/qemu-devel/2004-03/msg00202.html
> 
> Cheers, Jean-Michel

Actually, the interface name is reported as tun%d to the ifup script, and
qemu seems to freeze on the first packet transmit.  Other than that, no
problems so far using 32bit qemu on amd64 (I should add that I'm using it
for running reactos as a guest).  When I run my 64bit compiled version, the
tunnel name is reported correctly (tun1), and I suspect that packet transmit
would also work if qemu didn't crash with a segfault trying to execute the
first insruction.

I'd like to help with 64-bit porting.
-- 
IBM had little or no expertise on Intel processors.
 -- paragraph 54, SCO v IBM, second amended complaint
No matter how cynical you become, it's never enough to keep up.
 -- Lily Tomlin

[Qemu-devel] Re: QEMU 0.5.3 release

[Andi Kleen]

Martin Garton <martin@wrasse.demon.co.uk> writes:

> On Sun, 4 Apr 2004, Fabrice Bellard wrote:
>
>>    - initial x86-64 host support (Gwenole Beauchesne)
>
> Does this mean it will soon be possible to compile and run qemu on amd64
> emulating x86?
>
> Or is there still a lot to do?

Running 32bit qemu on the x86-64 kernel works mostly. qemu-i386
works nicely with single programs. I haven't tried a full system
emulation yet.

When running qemu-fast it sometimes gets into an endless segfault
loop. I didn't have time to track that down yet.

I think Gwenole's work is the beginning of 64bit on 64bit.

-Andi