* [PATCH] riscv: Call set_satp_mode_max_supported in riscv_host_cpu_init
@ 2023-09-19 7:57 Andreas Schwab
2023-09-19 11:18 ` Andrew Jones
0 siblings, 1 reply; 3+ messages in thread
From: Andreas Schwab @ 2023-09-19 7:57 UTC (permalink / raw)
To: qemu-devel
Cc: Alexandre Ghiti, Andrew Jones, Bin Meng, Frank Chang,
Alistair Francis, Palmer Dabbelt
When running in KVM mode with -cpu host, cfg.satp_mode.supported is not
initialized, causing an infinite loop in riscv_cpu_satp_mode_finalize.
Fixes: 6df3747a27 ("riscv: Introduce satp mode hw capabilities")
Signed-off-by: Andreas Schwab <schwab@suse.de>
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index f227c7664e..bb8dc3bb40 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -623,8 +623,10 @@ static void riscv_host_cpu_init(Object *obj)
CPURISCVState *env = &RISCV_CPU(obj)->env;
#if defined(TARGET_RISCV32)
set_misa(env, MXL_RV32, 0);
+ set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV32);
#elif defined(TARGET_RISCV64)
set_misa(env, MXL_RV64, 0);
+ set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
#endif
riscv_cpu_add_user_properties(obj);
}
--
2.42.0
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: Call set_satp_mode_max_supported in riscv_host_cpu_init
2023-09-19 7:57 [PATCH] riscv: Call set_satp_mode_max_supported in riscv_host_cpu_init Andreas Schwab
@ 2023-09-19 11:18 ` Andrew Jones
2023-09-20 13:31 ` Andreas Schwab
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Jones @ 2023-09-19 11:18 UTC (permalink / raw)
To: Andreas Schwab
Cc: qemu-devel, Alexandre Ghiti, Bin Meng, Frank Chang,
Alistair Francis, Palmer Dabbelt
On Tue, Sep 19, 2023 at 09:57:32AM +0200, Andreas Schwab wrote:
> When running in KVM mode with -cpu host, cfg.satp_mode.supported is not
> initialized, causing an infinite loop in riscv_cpu_satp_mode_finalize.
>
> Fixes: 6df3747a27 ("riscv: Introduce satp mode hw capabilities")
> Signed-off-by: Andreas Schwab <schwab@suse.de>
> ---
> target/riscv/cpu.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index f227c7664e..bb8dc3bb40 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -623,8 +623,10 @@ static void riscv_host_cpu_init(Object *obj)
> CPURISCVState *env = &RISCV_CPU(obj)->env;
> #if defined(TARGET_RISCV32)
> set_misa(env, MXL_RV32, 0);
> + set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV32);
> #elif defined(TARGET_RISCV64)
> set_misa(env, MXL_RV64, 0);
> + set_satp_mode_max_supported(RISCV_CPU(obj), VM_1_10_SV57);
> #endif
> riscv_cpu_add_user_properties(obj);
> }
> --
> 2.42.0
>
This should be fixed by
https://lore.kernel.org/all/20230911064320.939791-37-alistair.francis@wdc.com/
Thanks,
drew
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] riscv: Call set_satp_mode_max_supported in riscv_host_cpu_init
2023-09-19 11:18 ` Andrew Jones
@ 2023-09-20 13:31 ` Andreas Schwab
0 siblings, 0 replies; 3+ messages in thread
From: Andreas Schwab @ 2023-09-20 13:31 UTC (permalink / raw)
To: Andrew Jones
Cc: qemu-devel, Alexandre Ghiti, Bin Meng, Frank Chang,
Alistair Francis, Palmer Dabbelt
On Sep 19 2023, Andrew Jones wrote:
> This should be fixed by
>
> https://lore.kernel.org/all/20230911064320.939791-37-alistair.francis@wdc.com/
Thanks, I can confirm that it fixes the issue.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-09-20 13:32 UTC | newest]
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2023-09-19 7:57 [PATCH] riscv: Call set_satp_mode_max_supported in riscv_host_cpu_init Andreas Schwab
2023-09-19 11:18 ` Andrew Jones
2023-09-20 13:31 ` Andreas Schwab
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