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From: "l'indien" <l_indien_no_more_spams@magic.fr>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] Re: PowerPC implementations details
Date: Thu, 02 Jun 2005 10:35:33 +0200	[thread overview]
Message-ID: <pan.2005.06.02.08.35.32.384276@magic.fr> (raw)
In-Reply-To: pan.2005.05.28.19.55.39.742937@magic.fr

On Sat, 28 May 2005 21:55:40 +0200, l'indien wrote:

> In order to improve Qemu PowerPC emulation, I need a synthetic overview of
> SPR registers, MSR bits assignments and implemented instructions for every
> specific PowerPC implementation I want to emulate. As I was not able to
> find this kind of documentation, I started to work on it. For those
> interressed in PowerPC implementations details, here you'll find a first
> overview of SPRs assignment tables and MSR bits settings.

I did update my PowerPC cross-reference document,
adding the whole instructions sets for 32 bits PowerPC implementations
(ie POWER1 & 2, PPC 601, 602, 603, G2, 604, 74x, 75x, 74xx, 4xx, e500 &
RCPU).
I also added placeholders for 64 bits PowerPC implementations
(ie PPC 620, 63x, RS64, Power4, Power5 and 970).

Here are the links to those documents,
hoping it can be useful.

Formated output:
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.dvi>  (1869000 bytes)
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.ps>   (1715242 bytes)
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.html> (1505307 bytes)
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.txt>  (969637  bytes)

Document sources:
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.lyx>  (8353988 bytes)
<http://perso.magic.fr/l_indien/qemu-ppc/PowerPC_cr.tex>  (373684  bytes)

      reply	other threads:[~2005-06-02  8:40 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-05-28 19:55 [Qemu-devel] PowerPC implementations details l'indien
2005-06-02  8:35 ` l'indien [this message]

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