From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Nx1PV-0003BQ-MC for qemu-devel@nongnu.org; Wed, 31 Mar 2010 13:08:57 -0400 Received: from [140.186.70.92] (port=47409 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Nx1PU-00039t-8J for qemu-devel@nongnu.org; Wed, 31 Mar 2010 13:08:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Nx1PR-0000L2-HN for qemu-devel@nongnu.org; Wed, 31 Mar 2010 13:08:56 -0400 Received: from mail-pz0-f185.google.com ([209.85.222.185]:38721) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Nx1PR-0000Kf-Ch for qemu-devel@nongnu.org; Wed, 31 Mar 2010 13:08:53 -0400 Received: by pzk15 with SMTP id 15so341120pzk.29 for ; Wed, 31 Mar 2010 10:08:52 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1270052612-18351-1-git-send-email-pbonzini@redhat.com> References: <1270052612-18351-1-git-send-email-pbonzini@redhat.com> Date: Wed, 31 Mar 2010 20:08:52 +0300 Message-ID: From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Subject: [Qemu-devel] Re: [PATCH 0/5] *** SUBJECT HERE *** List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org On 3/31/10, Paolo Bonzini wrote: > On 03/26/2010 08:02 PM, Blue Swirl wrote: > > Comments, anyone? > > Sorry I'm late. > > I don't really like the changes introduced here, because they make > devices very very tied to the boards. Hopefully this could be changed > one day with qdev, and patches like this make this task more complicated. The real solution is to insert a byte swapping bus where needed and also make devices use some kind of memory API which goes through any buses (including byte swapping buses) in between the device and memory. > One example is the openpic page size pointed out downthread. > > What about something like this (doesn't change all the places affected > by your series, compile-tested only)? In general (with vmport and maybe virtio as the only exceptions), the devices have no business knowing _any_ CPU properties, like page size or endianness. If there really was a device that really cared about CPU page size, the size should be also known by the board and should be passed down from there via qdev property. Byte swapping should be handled by the bus, bus controller or memory controller. Your patch does not move things to right direction, instead the byte swapping remains at the device, so I don't think the patch should be applied. Thank you for the comments.