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From: SillyZ <1357816113@qq.com>
To: qemu-devel@nongnu.org
Cc: qemu-trivial@nongnu.org, SillyZ <1357816113@qq.com>
Subject: [PATCH] hw/net/can: Remove redundant status bit setting in can_sja1000
Date: Tue, 16 Sep 2025 16:10:09 +0800	[thread overview]
Message-ID: <tencent_E89CB2B19584679F7D6FF370ADEEC2992707@qq.com> (raw)

In PeliCAN mode reception, the RBS (Receive Buffer Status) bit
is set twice at line 842 and 845 with identical operations:
  s->status_pel |= 0x01;
  s->status_pel |= (1 << 0);

Between these two operations, only interrupt_pel is modified and
status_pel bit 4 is cleared, neither affecting bit 0. The second
operation is redundant.

This cleanup aligns PeliCAN mode with BasicCAN mode, which correctly
sets this bit only once (line 883).

Signed-off-by: SillyZ <1357816113@qq.com>
---
 hw/net/can/can_sja1000.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
index 5b6ba9df6c..6b08e977a1 100644
--- a/hw/net/can/can_sja1000.c
+++ b/hw/net/can/can_sja1000.c
@@ -842,7 +842,6 @@ ssize_t can_sja_receive(CanBusClientState *client, const qemu_can_frame *frames,
         s->status_pel |= 0x01; /* Set the Receive Buffer Status. DS-p23 */
         s->interrupt_pel |= 0x01;
         s->status_pel &= ~(1 << 4);
-        s->status_pel |= (1 << 0);
         can_sja_update_pel_irq(s);
     } else { /* BasicCAN mode */
 
-- 
2.47.1.windows.2



             reply	other threads:[~2025-09-16 13:50 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-16  8:10 SillyZ [this message]
2025-09-16 14:09 ` [PATCH] hw/net/can: Remove redundant status bit setting in can_sja1000 Peter Maydell
2025-09-17 14:45 ` Michael Tokarev

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