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Date: Mon, 27 Jun 2011 09:49:43 +1000
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Subject: Re: [Qemu-devel] GSoC Intro - Intel Itanium (IA64)
	processor	emulation
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To: Prashant Vaibhav <admin@mercurysquad.com>
Cc: Andreas =?UTF-8?B?RsOkcmJlcg==?= <andreas.faerber@web.de>, qemu-devel@nongnu.org, Alexander Graf <agraf@suse.de>

>>>>> "Prashant" =3D=3D Prashant Vaibhav <admin@mercurysquad.com> writes:

Prashant> Sorry I should have been more precise about that. I don't
Prashant> mean a standalone disassembler (objdump should handle that),
Prashant> I meant a simple instruction bundle decoder to decode the op
Prashant> code, arguments, predicate etc. so that we can generate the
Prashant> equivalent tcg primitives for it, like what target-i386/
Prashant> translate.c does. It's basically a warmup exercise for me so
Prashant> that I fully understand the ISA (completely different from
Prashant> x86 which I am more familiar with). I can then use it in my
Prashant> own target-ia64.

It may be worth taking a look at the source to `ski' --- an open source IA64
emulator.  It's in the Debian source tree.
It has a high performance instruction recogniser in it.
Prashant> ~Prashant

Prashant> On Sat, Jun 25, 2011 at 5:28 PM, Andreas F=C3=A4rber
Prashant> <andreas.faerber@web.de> wrote:

Prashant>     Hello Prashant,
  =20
Prashant>     Am 25.06.2011 um 07:50 schrieb Prashant Vaibhav:

Prashant>         Currently I am writing an IA64 ISA disassembler.

Prashant>     Why are you writing one yourself? Is that due to GPLv2
Prashant> vs. GPLv3 licensing issues with GNU binutils?
  =20
Prashant>     Andreas