[Qemu-devel] Supporting a new processor

[Qemu-devel] Supporting a new processor

[Gregory Jackson]

Hellow fellow developer,

Our research group at UCSC would like to use qemu to 
support a new ISA (instruction set architecture) being 
developed here. Are here any guidelines/documents on how 
to enable a new processor type?

Regards,
Gregory

Re: [Qemu-devel] Supporting a new processor

[Ozan Türkyılmaz]

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On 16/12/05, Gregory Jackson <gj9eng@ucsc.edu> wrote:
>
> Hellow fellow developer,
>
> Our research group at UCSC would like to use qemu to
> support a new ISA (instruction set architecture) being
> developed here. Are here any guidelines/documents on how
> to enable a new processor type?


http://libvncserver.sourceforge.net/qemu/qemu-porting.html

Regards,
> Gregory
>
>
> _______________________________________________
> Qemu-devel mailing list
> Qemu-devel@nongnu.org
> http://lists.nongnu.org/mailman/listinfo/qemu-devel
>



--
Ozan

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Re: [Qemu-devel] Supporting a new processor

[Johannes Schindelin]

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Hi,

On Fri, 16 Dec 2005, Ozan Türky?lmaz wrote:

> On 16/12/05, Gregory Jackson <gj9eng@ucsc.edu> wrote:
> >
> > Hellow fellow developer,
> >
> > Our research group at UCSC would like to use qemu to
> > support a new ISA (instruction set architecture) being
> > developed here. Are here any guidelines/documents on how
> > to enable a new processor type?
> 
> 
> http://libvncserver.sourceforge.net/qemu/qemu-porting.html

That helps mostly to understand how QEmu does things, and to port to a new 
*host*. If you want to support a new *target*, have a look at the first 
commits where a new target was added, such as

PatchSet 385 
Date: 2003/09/30 22:36:07
Author: bellard
Branch: HEAD
Tag: (none) 
Log:
sparc emulation target (thanx to Thomas M. Ogrisegg)

Members: 
        linux-user/sparc/syscall.h:INITIAL->1.1 
        linux-user/sparc/syscall_nr.h:INITIAL->1.1 
        target-sparc/cpu.h:INITIAL->1.1 
        target-sparc/exec.h:INITIAL->1.1 
        target-sparc/op.c:INITIAL->1.1 
        target-sparc/op_template.h:INITIAL->1.1 
        target-sparc/translate.c:INITIAL->1.1 

or

PatchSet 1461 
Date: 2005/07/02 16:56:31
Author: bellard
Branch: HEAD
Tag: (none) 
Log:
MIPS target (Jocelyn Mayer)

Members: 
        Makefile.target:1.71->1.72 
        cpu-all.h:1.43->1.44 
        cpu-exec.c:1.56->1.57 
        dis-asm.h:1.7->1.8 
        disas.c:1.23->1.24 
        elf.h:1.5->1.6 
        exec-all.h:1.32->1.33 
        softmmu_header.h:1.8->1.9 
        translate-all.c:1.12->1.13 
        vl.c:1.129->1.130 
        vl.h:1.76->1.77 
        hw/mips_r4k.c:INITIAL->1.1 
        target-mips/cpu.h:INITIAL->1.1 
        target-mips/exec.h:INITIAL->1.1 
        target-mips/helper.c:INITIAL->1.1 
        target-mips/mips-defs.h:INITIAL->1.1 
        target-mips/op.c:INITIAL->1.1 
        target-mips/op_helper.c:INITIAL->1.1 
        target-mips/op_helper_mem.c:INITIAL->1.1 
        target-mips/op_mem.c:INITIAL->1.1 
        target-mips/op_template.c:INITIAL->1.1 
        target-mips/translate.c:INITIAL->1.1 

Hth,
Dscho

Re: [Qemu-devel] Supporting a new processor

[Dave Feustel]

On Friday 16 December 2005 16:58, Ozan Türkyılmaz wrote:
> On 16/12/05, Gregory Jackson <gj9eng@ucsc.edu> wrote:
> >
> > Hellow fellow developer,
> >
> > Our research group at UCSC would like to use qemu to
> > support a new ISA (instruction set architecture) being
> > developed here

Details of new processor?

Speaking of new processor ports, has any interest been expressed in
a qemu simulator for Knuth's MMIX processor (256 64-bit register risc
machine)?

Thanks,
Dave Feustel
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