From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O6WGT-0005Lm-MQ for qemu-devel@nongnu.org; Mon, 26 Apr 2010 17:54:53 -0400 Received: from [140.186.70.92] (port=58923 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O6WGR-0005KQ-Ok for qemu-devel@nongnu.org; Mon, 26 Apr 2010 17:54:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O6WGM-0003Wm-OX for qemu-devel@nongnu.org; Mon, 26 Apr 2010 17:54:51 -0400 Received: from mail-ww0-f45.google.com ([74.125.82.45]:35948) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O6WGI-0003W2-Or for qemu-devel@nongnu.org; Mon, 26 Apr 2010 17:54:46 -0400 Received: by wwd20 with SMTP id 20so3367491wwd.4 for ; Mon, 26 Apr 2010 14:54:40 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <4BD0A994.2090608@twiddle.net> <20100422234934.D3ACB101C@are.twiddle.net> From: Artyom Tarasenko Date: Mon, 26 Apr 2010 23:54:20 +0200 Message-ID: Subject: Re: [Qemu-devel] Re: [PATCH] Remove IO_MEM_SUBWIDTH. Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl , Richard Henderson Cc: qemu-devel@nongnu.org This patch introduces a regression. qemu crashes on lance test: 6.2.1 i/o lance getid Pass 6.2.2 i/o lance csr Program received signal SIGSEGV, Segmentation fault. 0x0000000000000000 in ?? () (gdb) bt #0 0x0000000000000000 in ?? () #1 0x00000000004aaa3c in cpu_physical_memory_rw (addr=3D2017460240, buf=3D0x7fffffffda67 "", len=3D1, is_write=3D1) at /mnt/terra/projects/vanilla/qemu/exec.c:3427 #2 0x00000000004aaead in cpu_physical_memory_write (len=3D, buf=3D, addr=3D) at /mnt/terra/projects/vanilla/qemu/cpu-common.h:65 #3 stb_phys (len=3D, buf=3D, addr=3D) at /mnt/terra/projects/vanilla/qemu/exec.c:3861 #4 0x0000000040010802 in ?? () #5 0x0000000000005000 in ?? () #6 0xa8f9b203db7724d3 in ?? () #7 0x0000000000bef270 in ?? () #8 0x0000000000005000 in ?? () #9 0x00007ffff5880b60 in ?? () #10 0x0000000000000100 in ?? () #11 0x0000000000005a7c in ?? () #12 0x00000000004abcb1 in tb_gen_code (env=3D0x78400010, pc=3D, cs_base=3D, flags=3D, cflags=3D) at /mnt/terra/projects/vanilla/qemu/exec.c:997 #13 0x00000000004ad69d in cpu_sparc_exec (env1=3D) at /mnt/terra/projects/vanilla/qemu/cpu-exec.c:620 #14 0x0000000000406fc0 in qemu_cpu_exec (env=3D) at /mnt/terra/projects/vanilla/qemu/cpus.c:716 #15 tcg_cpu_exec (env=3D) at /mnt/terra/projects/vanilla/qemu/cpus.c:746 #16 0x00000000004ed715 in main_loop () at /mnt/terra/projects/vanilla/qemu/vl.c:1961 #17 main () at /mnt/terra/projects/vanilla/qemu/vl.c:3828 2010/4/25 Blue Swirl : > Thanks, applied. > > On 4/23/10, Richard Henderson wrote: >> Greatly simplify the subpage implementation by not supporting >> =A0multiple devices at the same address at different widths. =A0We >> =A0don't need full copies of mem_read/mem_write/opaque for each >> =A0address, only a single index back into the main io_mem_* arrays. >> >> =A0Signed-off-by: Richard Henderson >> =A0--- >> =A0 cpu-common.h | =A0 =A01 - >> =A0 exec.c =A0 =A0 =A0 | =A0113 ++++++++++++++++++----------------------= ----------------- >> =A0 2 files changed, 36 insertions(+), 78 deletions(-) >> >> =A0diff --git a/cpu-common.h b/cpu-common.h >> =A0index b730ca0..b24cecc 100644 >> =A0--- a/cpu-common.h >> =A0+++ b/cpu-common.h >> =A0@@ -125,7 +125,6 @@ void cpu_physical_memory_write_rom(target_phys_ad= dr_t addr, >> =A0 /* Acts like a ROM when read and like a device when written. =A0*/ >> =A0 #define IO_MEM_ROMD =A0 =A0 =A0 =A0(1) >> =A0 #define IO_MEM_SUBPAGE =A0 =A0 (2) >> =A0-#define IO_MEM_SUBWIDTH =A0 =A0(4) >> >> =A0 #endif >> >> =A0diff --git a/exec.c b/exec.c >> =A0index 43366ac..14d1fd7 100644 >> =A0--- a/exec.c >> =A0+++ b/exec.c >> =A0@@ -2549,16 +2549,15 @@ static inline void tlb_set_dirty(CPUState *en= v, >> =A0 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) >> =A0 typedef struct subpage_t { >> =A0 =A0 =A0target_phys_addr_t base; >> =A0- =A0 =A0CPUReadMemoryFunc * const *mem_read[TARGET_PAGE_SIZE][4]; >> =A0- =A0 =A0CPUWriteMemoryFunc * const *mem_write[TARGET_PAGE_SIZE][4]; >> =A0- =A0 =A0void *opaque[TARGET_PAGE_SIZE][2][4]; >> =A0- =A0 =A0ram_addr_t region_offset[TARGET_PAGE_SIZE][2][4]; >> =A0+ =A0 =A0ram_addr_t sub_io_index[TARGET_PAGE_SIZE]; >> =A0+ =A0 =A0ram_addr_t region_offset[TARGET_PAGE_SIZE]; >> =A0 } subpage_t; >> >> =A0 static int subpage_register (subpage_t *mmio, uint32_t start, uint32= _t end, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ram_addr_t m= emory, ram_addr_t region_offset); >> =A0-static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys= , >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ram_addr_t orig= _memory, ram_addr_t region_offset); >> =A0+static subpage_t *subpage_init (target_phys_addr_t base, ram_addr_t = *phys, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ram_= addr_t orig_memory, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ram_= addr_t region_offset); >> =A0 #define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_a= ddr2, \ >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0need_subpage) =A0 =A0 =A0= =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 \ >> =A0 =A0 =A0do { =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0\ >> =A0@@ -2596,7 +2595,7 @@ void cpu_register_physical_memory_offset(target= _phys_addr_t start_addr, >> =A0 =A0 =A0PhysPageDesc *p; >> =A0 =A0 =A0CPUState *env; >> =A0 =A0 =A0ram_addr_t orig_size =3D size; >> =A0- =A0 =A0void *subpage; >> =A0+ =A0 =A0subpage_t *subpage; >> >> =A0 =A0 =A0cpu_notify_set_memory(start_addr, size, phys_offset); >> >> =A0@@ -2615,7 +2614,7 @@ void cpu_register_physical_memory_offset(target= _phys_addr_t start_addr, >> >> =A0 =A0 =A0 =A0 =A0 =A0 =A0CHECK_SUBPAGE(addr, start_addr, start_addr2, = end_addr, end_addr2, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0need_subpage); >> =A0- =A0 =A0 =A0 =A0 =A0 =A0if (need_subpage || phys_offset & IO_MEM_SUB= WIDTH) { >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0if (need_subpage) { >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (!(orig_memory & IO_MEM_SUBPAGE)) = { >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0subpage =3D subpage_init((add= r & TARGET_PAGE_MASK), >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 &p->phys_offset, orig_memory, >> =A0@@ -2647,7 +2646,7 @@ void cpu_register_physical_memory_offset(target= _phys_addr_t start_addr, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0CHECK_SUBPAGE(addr, start_addr, start= _addr2, end_addr, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0end_addr2= , need_subpage); >> >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (need_subpage || phys_offset & IO= _MEM_SUBWIDTH) { >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (need_subpage) { >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0subpage =3D subpage_init((add= r & TARGET_PAGE_MASK), >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 &p->phys_offset, IO_MEM_UNASSIGNED, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 addr & TARGET_PAGE_MASK); >> =A0@@ -3145,89 +3144,65 @@ static CPUWriteMemoryFunc * const watch_mem_w= rite[3] =3D { >> =A0 =A0 =A0watch_mem_writel, >> =A0 }; >> >> =A0-static inline uint32_t subpage_readlen (subpage_t *mmio, target_phys= _addr_t addr, >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 uns= igned int len) >> =A0+static inline uint32_t subpage_readlen (subpage_t *mmio, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= =A0 =A0 =A0target_phys_addr_t addr, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= =A0 =A0 =A0unsigned int len) >> =A0 { >> =A0- =A0 =A0uint32_t ret; >> =A0- =A0 =A0unsigned int idx; >> =A0- >> =A0- =A0 =A0idx =3D SUBPAGE_IDX(addr); >> =A0+ =A0 =A0unsigned int idx =3D SUBPAGE_IDX(addr); >> =A0 #if defined(DEBUG_SUBPAGE) >> =A0 =A0 =A0printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d\= n", __func__, >> =A0 =A0 =A0 =A0 =A0 =A0 mmio, len, addr, idx); >> =A0 #endif >> =A0- =A0 =A0ret =3D (**mmio->mem_read[idx][len])(mmio->opaque[idx][0][le= n], >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= =A0 =A0 addr + mmio->region_offset[idx][0][len]); >> >> =A0- =A0 =A0return ret; >> =A0+ =A0 =A0addr +=3D mmio->region_offset[idx]; >> =A0+ =A0 =A0idx =3D mmio->sub_io_index[idx]; >> =A0+ =A0 =A0return io_mem_read[idx][len](io_mem_opaque[idx], addr); >> =A0 } >> >> =A0 static inline void subpage_writelen (subpage_t *mmio, target_phys_ad= dr_t addr, >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0uint32_t= value, unsigned int len) >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= =A0 uint32_t value, unsigned int len) >> =A0 { >> =A0- =A0 =A0unsigned int idx; >> =A0- >> =A0- =A0 =A0idx =3D SUBPAGE_IDX(addr); >> =A0+ =A0 =A0unsigned int idx =3D SUBPAGE_IDX(addr); >> =A0 #if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d= value %08x\n", __func__, >> =A0- =A0 =A0 =A0 =A0 =A0 mmio, len, addr, idx, value); >> =A0+ =A0 =A0printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d= value %08x\n", >> =A0+ =A0 =A0 =A0 =A0 =A0 __func__, mmio, len, addr, idx, value); >> =A0 #endif >> =A0- =A0 =A0(**mmio->mem_write[idx][len])(mmio->opaque[idx][1][len], >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= addr + mmio->region_offset[idx][1][len], >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0= value); >> =A0+ >> =A0+ =A0 =A0addr +=3D mmio->region_offset[idx]; >> =A0+ =A0 =A0idx =3D mmio->sub_io_index[idx]; >> =A0+ =A0 =A0io_mem_write[idx][len](io_mem_opaque[idx], addr, value); >> =A0 } >> >> =A0 static uint32_t subpage_readb (void *opaque, target_phys_addr_t addr= ) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >> =A0-#endif >> =A0- >> =A0 =A0 =A0return subpage_readlen(opaque, addr, 0); >> =A0 } >> >> =A0 static void subpage_writeb (void *opaque, target_phys_addr_t addr, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0uint32_t valu= e) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, a= ddr, value); >> =A0-#endif >> =A0 =A0 =A0subpage_writelen(opaque, addr, value, 0); >> =A0 } >> >> =A0 static uint32_t subpage_readw (void *opaque, target_phys_addr_t addr= ) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >> =A0-#endif >> =A0- >> =A0 =A0 =A0return subpage_readlen(opaque, addr, 1); >> =A0 } >> >> =A0 static void subpage_writew (void *opaque, target_phys_addr_t addr, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0uint32_t valu= e) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, a= ddr, value); >> =A0-#endif >> =A0 =A0 =A0subpage_writelen(opaque, addr, value, 1); >> =A0 } >> >> =A0 static uint32_t subpage_readl (void *opaque, target_phys_addr_t addr= ) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >> =A0-#endif >> =A0- >> =A0 =A0 =A0return subpage_readlen(opaque, addr, 2); >> =A0 } >> >> =A0-static void subpage_writel (void *opaque, >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 target_phys_addr_t = addr, uint32_t value) >> =A0+static void subpage_writel (void *opaque, target_phys_addr_t addr, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0uint32_t val= ue) >> =A0 { >> =A0-#if defined(DEBUG_SUBPAGE) >> =A0- =A0 =A0printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, a= ddr, value); >> =A0-#endif >> =A0 =A0 =A0subpage_writelen(opaque, addr, value, 2); >> =A0 } >> >> =A0@@ -3247,7 +3222,6 @@ static int subpage_register (subpage_t *mmio, u= int32_t start, uint32_t end, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ram_addr_t m= emory, ram_addr_t region_offset) >> =A0 { >> =A0 =A0 =A0int idx, eidx; >> =A0- =A0 =A0unsigned int i; >> >> =A0 =A0 =A0if (start >=3D TARGET_PAGE_SIZE || end >=3D TARGET_PAGE_SIZE) >> =A0 =A0 =A0 =A0 =A0return -1; >> =A0@@ -3257,27 +3231,18 @@ static int subpage_register (subpage_t *mmio,= uint32_t start, uint32_t end, >> =A0 =A0 =A0printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld= \n", __func__, >> =A0 =A0 =A0 =A0 =A0 =A0 mmio, start, end, idx, eidx, memory); >> =A0 #endif >> =A0- =A0 =A0memory >>=3D IO_MEM_SHIFT; >> =A0+ =A0 =A0memory =3D (memory >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1= ); >> =A0 =A0 =A0for (; idx <=3D eidx; idx++) { >> =A0- =A0 =A0 =A0 =A0for (i =3D 0; i < 4; i++) { >> =A0- =A0 =A0 =A0 =A0 =A0 =A0if (io_mem_read[memory][i]) { >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->mem_read[idx][i] =3D &io_mem_r= ead[memory][i]; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->opaque[idx][0][i] =3D io_mem_o= paque[memory]; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->region_offset[idx][0][i] =3D r= egion_offset; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0} >> =A0- =A0 =A0 =A0 =A0 =A0 =A0if (io_mem_write[memory][i]) { >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->mem_write[idx][i] =3D &io_mem_= write[memory][i]; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->opaque[idx][1][i] =3D io_mem_o= paque[memory]; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mmio->region_offset[idx][1][i] =3D r= egion_offset; >> =A0- =A0 =A0 =A0 =A0 =A0 =A0} >> =A0- =A0 =A0 =A0 =A0} >> =A0+ =A0 =A0 =A0 =A0mmio->sub_io_index[idx] =3D memory; >> =A0+ =A0 =A0 =A0 =A0mmio->region_offset[idx] =3D region_offset; >> =A0 =A0 =A0} >> >> =A0 =A0 =A0return 0; >> =A0 } >> >> =A0-static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys= , >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ram_addr_t orig= _memory, ram_addr_t region_offset) >> =A0+static subpage_t *subpage_init (target_phys_addr_t base, ram_addr_t = *phys, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ram_= addr_t orig_memory, >> =A0+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0ram_= addr_t region_offset) >> =A0 { >> =A0 =A0 =A0subpage_t *mmio; >> =A0 =A0 =A0int subpage_memory; >> =A0@@ -3291,8 +3256,7 @@ static void *subpage_init (target_phys_addr_t b= ase, ram_addr_t *phys, >> =A0 =A0 =A0 =A0 =A0 =A0 mmio, base, TARGET_PAGE_SIZE, subpage_memory); >> =A0 #endif >> =A0 =A0 =A0*phys =3D subpage_memory | IO_MEM_SUBPAGE; >> =A0- =A0 =A0subpage_register(mmio, 0, TARGET_PAGE_SIZE - 1, orig_memory, >> =A0- =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 region_offset); >> =A0+ =A0 =A0subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, orig_memory, r= egion_offset); >> >> =A0 =A0 =A0return mmio; >> =A0 } >> =A0@@ -3322,8 +3286,6 @@ static int cpu_register_io_memory_fixed(int io_= index, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0CPUWriteMemoryFunc * const *mem_write, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0void *opaque) >> =A0 { >> =A0- =A0 =A0int i, subwidth =3D 0; >> =A0- >> =A0 =A0 =A0if (io_index <=3D 0) { >> =A0 =A0 =A0 =A0 =A0io_index =3D get_free_io_mem_idx(); >> =A0 =A0 =A0 =A0 =A0if (io_index =3D=3D -1) >> =A0@@ -3334,14 +3296,11 @@ static int cpu_register_io_memory_fixed(int i= o_index, >> =A0 =A0 =A0 =A0 =A0 =A0 =A0return -1; >> =A0 =A0 =A0} >> >> =A0- =A0 =A0for(i =3D 0;i < 3; i++) { >> =A0- =A0 =A0 =A0 =A0if (!mem_read[i] || !mem_write[i]) >> =A0- =A0 =A0 =A0 =A0 =A0 =A0subwidth =3D IO_MEM_SUBWIDTH; >> =A0- =A0 =A0 =A0 =A0io_mem_read[io_index][i] =3D mem_read[i]; >> =A0- =A0 =A0 =A0 =A0io_mem_write[io_index][i] =3D mem_write[i]; >> =A0- =A0 =A0} >> =A0+ =A0 =A0memcpy(io_mem_read[io_index], mem_read, 3 * sizeof(CPUReadMe= moryFunc*)); >> =A0+ =A0 =A0memcpy(io_mem_write[io_index], mem_write, 3 * sizeof(CPUWrit= eMemoryFunc*)); >> =A0 =A0 =A0io_mem_opaque[io_index] =3D opaque; >> =A0- =A0 =A0return (io_index << IO_MEM_SHIFT) | subwidth; >> =A0+ >> =A0+ =A0 =A0return (io_index << IO_MEM_SHIFT); >> =A0 } >> >> =A0 int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read, >> >> -- >> =A01.6.6.1 >> >> > > > --=20 Regards, Artyom Tarasenko solaris/sparc under qemu blog: http://tyom.blogspot.com/