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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454d508cbdesm703125e9.33.2025.07.08.14.53.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 08 Jul 2025 14:53:36 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , Pierrick Bouvier , Thomas Huth , qemu-riscv@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Manos Pitsidianakis , "Michael S. Tsirkin" , qemu-block@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.1 RESEND v8 3/8] qemu/target-info: Add %target_arch field to TargetInfo Date: Tue, 8 Jul 2025 23:53:14 +0200 Message-ID: <20250708215320.70426-4-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708215320.70426-1-philmd@linaro.org> References: <20250708215320.70426-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/qemu/target-info-impl.h | 4 +++- target-info-stub.c | 1 + target-info.c | 9 +++++++-- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h index 1b51cbcfe1b..a8b34d150ab 100644 --- a/include/qemu/target-info-impl.h +++ b/include/qemu/target-info-impl.h @@ -9,11 +9,13 @@ #ifndef QEMU_TARGET_INFO_IMPL_H #define QEMU_TARGET_INFO_IMPL_H -#include "qemu/target-info.h" +#include "qapi/qapi-types-machine.h" typedef struct TargetInfo { /* runtime equivalent of TARGET_NAME definition */ const char *target_name; + /* related to TARGET_ARCH definition */ + SysEmuTarget target_arch; /* runtime equivalent of TARGET_LONG_BITS definition */ unsigned long_bits; /* runtime equivalent of CPU_RESOLVING_TYPE definition */ diff --git a/target-info-stub.c b/target-info-stub.c index fecc0e71286..2e4407ff04b 100644 --- a/target-info-stub.c +++ b/target-info-stub.c @@ -14,6 +14,7 @@ static const TargetInfo target_info_stub = { .target_name = TARGET_NAME, + .target_arch = SYS_EMU_TARGET__MAX, .long_bits = TARGET_LONG_BITS, .cpu_type = CPU_RESOLVING_TYPE, .machine_typename = TYPE_MACHINE, diff --git a/target-info.c b/target-info.c index 9ebabec988f..8e29553b4ef 100644 --- a/target-info.c +++ b/target-info.c @@ -24,8 +24,13 @@ unsigned target_long_bits(void) SysEmuTarget target_arch(void) { - return qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1, - &error_abort); + SysEmuTarget arch = target_info()->target_arch; + + if (arch == SYS_EMU_TARGET__MAX) { + arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1, + &error_abort); + } + return arch; } const char *target_cpu_type(void) -- 2.49.0