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Iglesias" , Aurelien Jarno , Richard Henderson , Thomas Huth , Max Filippov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Michael Rolnik , Song Gao , qemu-riscv@nongnu.org, Aleksandar Rikalo , Julian Ganz Subject: [PATCH 15/35] target/i386: call plugin trap callbacks Date: Mon, 27 Oct 2025 11:03:22 +0000 Message-ID: <20251027110344.2289945-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251027110344.2289945-1-alex.bennee@linaro.org> References: <20251027110344.2289945-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org From: Julian Ganz We recently introduced API for registering callbacks for trap related events as well as the corresponding hook functions. Due to differences between architectures, the latter need to be called from target specific code. This change places the hook for x86 targets. Signed-off-by: Julian Ganz Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée --- target/i386/tcg/excp_helper.c | 3 +++ target/i386/tcg/seg_helper.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/target/i386/tcg/excp_helper.c b/target/i386/tcg/excp_helper.c index 6fb8036d988..32f2784e923 100644 --- a/target/i386/tcg/excp_helper.c +++ b/target/i386/tcg/excp_helper.c @@ -23,6 +23,7 @@ #include "system/runstate.h" #include "exec/helper-proto.h" #include "helper-tcg.h" +#include "qemu/plugin.h" G_NORETURN void helper_raise_interrupt(CPUX86State *env, int intno, int next_eip_addend) @@ -93,6 +94,7 @@ void raise_interrupt2(CPUX86State *env, int intno, uintptr_t retaddr) { CPUState *cs = env_cpu(env); + uint64_t last_pc = env->eip + env->segs[R_CS].base; if (!is_int) { cpu_svm_check_intercept_param(env, SVM_EXIT_EXCP_BASE + intno, @@ -106,6 +108,7 @@ void raise_interrupt2(CPUX86State *env, int intno, env->error_code = error_code; env->exception_is_int = is_int; env->exception_next_eip = env->eip + next_eip_addend; + qemu_plugin_vcpu_exception_cb(cs, last_pc); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index f49fe851cdf..667b1c38696 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -29,6 +29,7 @@ #include "seg_helper.h" #include "access.h" #include "tcg-cpu.h" +#include "qemu/plugin.h" #ifdef TARGET_X86_64 #define SET_ESP(val, sp_mask) \ @@ -1192,6 +1193,7 @@ void do_interrupt_all(X86CPU *cpu, int intno, int is_int, int error_code, target_ulong next_eip, int is_hw) { CPUX86State *env = &cpu->env; + uint64_t last_pc = env->eip + env->segs[R_CS].base; if (qemu_loglevel_mask(CPU_LOG_INT)) { if ((env->cr[0] & CR0_PE_MASK)) { @@ -1263,6 +1265,8 @@ void do_interrupt_all(X86CPU *cpu, int intno, int is_int, event_inj & ~SVM_EVTINJ_VALID); } #endif + + qemu_plugin_vcpu_interrupt_cb(CPU(cpu), last_pc); } void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw) -- 2.47.3