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Iglesias" , Aurelien Jarno , Richard Henderson , Thomas Huth , Max Filippov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Michael Rolnik , Song Gao , qemu-riscv@nongnu.org, Aleksandar Rikalo , Julian Ganz Subject: [PATCH 26/35] target/sparc: call plugin trap callbacks Date: Mon, 27 Oct 2025 11:03:33 +0000 Message-ID: <20251027110344.2289945-27-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251027110344.2289945-1-alex.bennee@linaro.org> References: <20251027110344.2289945-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org From: Julian Ganz We recently introduced API for registering callbacks for trap related events as well as the corresponding hook functions. Due to differences between architectures, the latter need to be called from target specific code. This change places hooks for SPARC (32bit and 64bit) targets. We treat any interrupt other than EXTINT and IVEC as exceptions as they appear to be synchroneous events. Reviewed-by: Richard Henderson Signed-off-by: Julian Ganz Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée --- target/sparc/int32_helper.c | 7 +++++++ target/sparc/int64_helper.c | 10 ++++++++++ 2 files changed, 17 insertions(+) diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index fdcaa0a578b..b29f693a6bf 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -24,6 +24,7 @@ #include "accel/tcg/cpu-ldst.h" #include "exec/log.h" #include "system/runstate.h" +#include "qemu/plugin.h" static const char * const excp_names[0x80] = { [TT_TFAULT] = "Instruction Access Fault", @@ -174,4 +175,10 @@ void sparc_cpu_do_interrupt(CPUState *cs) env->qemu_irq_ack(env, intno); } #endif + + if (intno == TT_EXTINT) { + qemu_plugin_vcpu_interrupt_cb(cs, env->regwptr[9]); + } else { + qemu_plugin_vcpu_exception_cb(cs, env->regwptr[9]); + } } diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c index 96ef81c26cd..60ab0478fc6 100644 --- a/target/sparc/int64_helper.c +++ b/target/sparc/int64_helper.c @@ -24,6 +24,7 @@ #include "exec/helper-proto.h" #include "exec/log.h" #include "trace.h" +#include "qemu/plugin.h" #define DEBUG_PCALL @@ -256,6 +257,15 @@ void sparc_cpu_do_interrupt(CPUState *cs) } env->npc = env->pc + 4; cs->exception_index = -1; + + switch (intno) { + case TT_EXTINT: + case TT_IVEC: + qemu_plugin_vcpu_interrupt_cb(cs, tsptr->tpc); + break; + default: + qemu_plugin_vcpu_exception_cb(cs, tsptr->tpc); + } } trap_state *cpu_tsptr(CPUSPARCState* env) -- 2.47.3