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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e5c3cad50sm39100755e9.3.2025.10.01.09.42.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Oct 2025 09:42:23 -0700 (PDT) Message-ID: <2a53049c-01e2-4f0e-ac51-f55d50173b22@linaro.org> Date: Wed, 1 Oct 2025 18:42:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/22] hw/core/cpu: Remove @CPUState::as field Content-Language: en-US To: Richard Henderson , Peter Maydell Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Paolo Bonzini , Pierrick Bouvier , Peter Xu References: <20251001150529.14122-1-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org On 1/10/25 18:35, Richard Henderson wrote: > On 10/1/25 09:08, Peter Maydell wrote: >> On Wed, 1 Oct 2025 at 16:05, Philippe Mathieu-Daudé >> wrote: >>> >>> Instead of using the convenient @CPUState::as shortcut, use >>> cpu_get_address_space(asidx=0) to get the vCPU first address >>> space. >>> >>> The goal is to reduce the risk of AS mis-use for targets >>> that uses multiple ASes per vCPU. >> >> I'm not sure I agree with this. The cpu->as is handy for >> the large number of targets which only use one AddressSpace: >> which is everything except arm and x86 right now. >> >> Targets that use multiple address spaces need to be careful >> about which AS they use by definition. Unless we have a >> track record of code in those targets carelessly using >> cpu->as when it should do something else, I'm not sure >> that there's a benefit that makes it worth making the >> "use the one and only AS this CPU will ever have" more awkward. > > I agree. > > Moreover, '0' as a default is just as bad as cpu->as, because you're > giving no thought to the selection.  Similarly using > MEMATTRS_UNSPECIFIED.  When such things matter, we need the real > attributes and/or as piped down from the proper memory reference. OK.