From: Joel Stanley <joel@jms.id.au>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Nicholas Piggin" <npiggin@gmail.com>,
qemu-riscv@nongnu.org, "Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
qemu-devel@nongnu.org, "Chao Liu" <chao.liu@zevorn.cn>,
"Nicholas Joaquin" <njoaquin@tenstorrent.com>,
"Ganesh Valliappan" <gvalliappan@tenstorrent.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [PATCH 2/3] target/risvc: Fix vector whole ldst vstart check
Date: Wed, 17 Sep 2025 23:14:41 +0930 [thread overview]
Message-ID: <CACPK8Xd183vLgSyNfjzN5caUeJGRrjM1J8ugTVRd2k0Ea5LpfQ@mail.gmail.com> (raw)
In-Reply-To: <188f0525-154e-4d08-a155-68e8800e302d@linaro.org>
On Fri, 5 Sept 2025 at 16:50, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 9/4/25 13:06, Daniel Henrique Barboza wrote:
> > How hard it is to update the GCC version we're running in the docker images for
> > "check-tcg"? We would like to use a RISC-V vector header that isn't supported
> > ATM.
> If debian packages the gcc version, then it's easy: change
>
> gcc-riscv-linux-gnu
>
> to
>
> gcc-NN-riscv-linux-gnu
The test that was failing uses debian-all-test-cross. This is based on
Debian 12 which maxes out at GCC 12.
If we move to Debian 13, we get GCC 14. Something like this would do it:
--- a/tests/docker/dockerfiles/debian-all-test-cross.docker
+++ b/tests/docker/dockerfiles/debian-all-test-cross.docker
@@ -6,7 +6,7 @@
# basic compilers for as many targets as possible. We shall use this
# to build and run linux-user tests on GitLab
#
-FROM docker.io/library/debian:12-slim
+FROM docker.io/library/debian:13-slim
Is updating the distro something we would consider for this development cycle?
Cheers,
Joel
next prev parent reply other threads:[~2025-09-17 13:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-03 3:01 [PATCH 0/3] target/riscv: corner case fixes Nicholas Piggin
2025-09-03 3:01 ` [PATCH 1/3] target/riscv: Fix IALIGN check in misa write Nicholas Piggin
2025-09-03 17:19 ` Daniel Henrique Barboza
2025-09-03 3:01 ` [PATCH 2/3] target/risvc: Fix vector whole ldst vstart check Nicholas Piggin
2025-09-03 20:13 ` Daniel Henrique Barboza
2025-09-04 5:16 ` Nicholas Piggin
2025-09-04 11:06 ` Daniel Henrique Barboza
2025-09-05 7:18 ` Richard Henderson
2025-09-17 13:44 ` Joel Stanley [this message]
2025-09-17 13:53 ` Daniel P. Berrangé
2025-09-03 3:01 ` [PATCH 3/3] tests/tcg: Add riscv test for interrupted vector ops Nicholas Piggin
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