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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8f4ab0sm22005734f8f.52.2025.10.06.12.08.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Oct 2025 12:08:06 -0700 (PDT) Message-ID: Date: Mon, 6 Oct 2025 21:08:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 21/22] exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Richard Henderson , qemu-riscv@nongnu.org, Peter Maydell , qemu-ppc@nongnu.org, Paolo Bonzini , Pierrick Bouvier , Peter Xu , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Zhao Liu References: <20251001150529.14122-1-philmd@linaro.org> <20251001150529.14122-22-philmd@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20251001150529.14122-22-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org (ping for this single patch) On 1/10/25 17:05, Philippe Mathieu-Daudé wrote: > cpu_memory_rw_debug() dispatches to CPUClass::memory_rw_debug(), > move its declaration closer to the CPU API. Document. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/exec/cpu-common.h | 4 ---- > include/hw/core/cpu.h | 20 ++++++++++++++++++++ > 2 files changed, 20 insertions(+), 4 deletions(-) > > diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h > index 910e1c2afb9..ce64a999035 100644 > --- a/include/exec/cpu-common.h > +++ b/include/exec/cpu-common.h > @@ -150,10 +150,6 @@ typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); > > int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); > > -/* Returns: 0 on success, -1 on error */ > -int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, > - void *ptr, size_t len, bool is_write); > - > /* vl.c */ > void list_cpus(void); > > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index 0f7eda1a10d..1e928f57c99 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -685,6 +685,26 @@ int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, > int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, > void *opaque); > > +/** > + * cpu_memory_rw_debug: > + * @cpu: The CPU whose memory is to be accessed > + * @addr: guest virtual address > + * @ptr: buffer with the data transferred > + * @len: the number of bytes to read or write > + * @is_write: indicates the transfer direction > + * > + * Take a virtual address, convert it to a physical address via > + * an MMU lookup using the current settings of the specified CPU, > + * and then perform the access (using address_space_rw() for > + * reads or address_space_write_rom() for writes). > + * > + * This function is intended for use by the GDB stub and similar code. > + * > + * Returns: 0 on success, -1 on error > + */ > +int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, > + void *ptr, size_t len, bool is_write); > + > /** > * cpu_get_crash_info: > * @cpu: The CPU to get crash information for