2026-07-20 17:41 [PATCH v3 06/13] semihosting: add callback to set error
2026-07-20 11:02 [PATCH v4 01/10] build: add optional librpmi dependency 11+ messages
2026-07-20 10:56 [PATCH] target/riscv: use SXL instead of MXL for read_sstatus
2026-07-20 7:45 [RFC PATCH 1/3] hw/riscv: add K230 SRAM device model 4+ messages
2026-07-19 18:02 [PATCH v2 2/2] hw/riscv/k230: wire up the RMU device 2+ messages
2026-07-19 11:17 [PATCH] target/riscv: allow menvcfg/henvcfg LPE and SSE bits on RV32
2026-07-18 2:16 [PATCH v3] riscv/virt: Add optional UART1 2+ messages
2026-07-17 14:45 [PATCH] hw/riscv/riscv-iommu: preserve requested perm in spa_fetch() 3+ messages
2026-07-17 13:51 [PATCH v2 0/6] qom: tidy-ups and preparation for class property conversion 11+ messages
2026-07-17 11:23 [PATCH] hw/riscv/riscv-iommu: fix U-bit check to apply only to leaf S/VS-stage PTEs 2+ messages
2026-07-17 11:19 [PATCH 5/5] qom/object.c: rename object_class_property_uint*_ptr() to object_class_static_property_uint*_ptr() 14+ messages
2026-07-17 10:06 [PATCH v2 05/18] target/riscv: Add packed SIMD absolute, difference, compare and mask instructions 19+ messages
2026-07-17 9:40 [PATCH v2] tcg/riscv: raise VLEN limit to the specification's maximum
2026-07-16 18:06 [PATCH v2 07/14] semihosting: add callback to set error
2026-07-16 15:46 [PATCH v2 0/3] Correct cbo and lq disassembly 6+ messages
2026-07-16 13:24 [PATCH 2/3] hw/riscv: Connect K230 DDR controller and PHY models 4+ messages
2026-07-16 12:35 [PATCH for-11.1 01/17] target/riscv/debug: Check only mcontrol triggers for break/watchpoint matching 18+ messages
2026-07-15 19:07 [PATCH 1/3] disas/riscv.c: Correct wrong shifts for cbo 10+ messages
2026-07-15 14:50 [PATCH v7 06/11] target/riscv: Fix smrnmi isa alphabetical order 12+ messages
2026-07-15 12:30 riscv & qemu-stable (was: [PULL 0/4] riscv-to-apply queue)
2026-07-15 6:52 Re: [PATCH] exec: Add RISC-V WorldGuard WID field to MemTxAttrs 8+ messages
2026-07-14 15:42 [PATCH v19 03/15] net/tap: deprecate "no" as special value for script/downscript
2026-07-14 11:24 Re: [PATCH v6 0/6] target/riscv: Implement Smsdid and Smmpt extension
2026-07-14 10:21 [PATCH v2 0/3] hw/riscv/k230: add IOMUX register block model 6+ messages
2026-07-14 7:56 [PATCH v3 00/10] riscv: add initial RPMI virt support 31+ messages
2026-07-14 6:01 [PATCH] hw/riscv/riscv-iommu.c: always send MRIF notice MSI
2026-07-13 20:07 [PATCH 05/14] semihosting: add callback to set error 4+ messages
2026-07-13 12:02 [PATCH] tests/functional/riscv64: sifive_u: Fix kernel command line 3+ messages
2026-07-13 5:09 Re: [PATCH] tests/functional/riscv64: Add K230 Linux boot tests
2026-07-13 3:51 [PATCH v6 2/6] target/riscv: Enable Zicclsm for the compatible CPUs 9+ messages
2026-07-13 1:06 Re: [PATCH] tests/functional/riscv64: Add K230 Linux boot tests
2026-07-12 8:45 [PATCH v1] uftrace: riscv privilege level 5+ messages
2026-07-11 22:35 [RFC PATCH 032/134] hw/xen: Give onboard devices a QOM parent 290+ messages
2026-07-10 20:53 [PATCH v3 17/51] gdbstub: Report actual watchpoint trigger address 99+ messages
2026-07-10 19:17 [PATCH v18 03/14] net/tap: deprecate "no" as special value for script/downscript 5+ messages
2026-07-10 11:43 [PATCH 2/2] MAINTAINERS: Mark "vhost-user-scmi" orphaned 19+ messages
2026-07-10 11:25 Re: MAINTAINERS entries that aren't S: Orphan but maybe should be
2026-07-10 8:39 [PATCH v2 07/10] riscv: add RPMI system suspend service 22+ messages
2026-07-10 6:09 [PATCH v5 0/7] target/riscv: Support the true Zicclsm extension 8+ messages
2026-07-10 4:18 [PATCH RFC 1/1] hw/riscv/k230: add IOMUX register block model 4+ messages
2026-07-09 14:59 Call to clean up QOM onboard devices lacking a parent 9+ messages
2026-07-09 3:12 [RFC PATCH 2/2] hw/riscv/k230: wire up the RMU device 7+ messages
2026-07-08 16:18 [PATCH v6 0/9] target/riscv: Add RISC-V Zvfofp8min extension support 11+ messages
2026-07-08 9:19 Re: [PATCH v3 0/5] linux-user/riscv: add vector state to signal context
2026-07-07 13:27 [PATCH] MAINTAINERS: update Chao Liu's email address 3+ messages
2026-07-07 12:28 [PATCH] tcg/x86_64: declare MO_ATOM_WITHIN16 host atomicity support 3+ messages
2026-07-07 9:10 [PATCH v4 5/6] hw/riscv: sifive_u: Align ROM reset vector data 13+ messages
2026-07-07 7:26 [PATCH v2 RESEND] target/riscv/kvm: add extensions after v7.1-rc4 update 3+ messages
2026-07-07 6:27 Re: [PATCH v3 00/91] tests/tcg: run tests with meson
2026-07-06 14:46 CFP for Plumbers RISC-V MC
2026-07-05 14:02 [PATCH v2] target/riscv: check G-stage write permission for VS-stage A/D updates 2+ messages
2026-07-05 13:16 [PATCH] target/riscv: check G-stage write permission for VS-stage A/D updates
2026-07-05 4:37 [PATCH v2 24/46] system: Remove cpu_watchpoint_insert error return path 48+ messages
2026-07-03 18:05 [PATCH v4 01/24] target/riscv: Remove unused tcg/tcg.h include 30+ messages
2026-07-03 6:51 [PATCH] target/riscv: fix amocas with rd = x0 followed by beq involving x0 is not taken when it should be 2+ messages
2026-07-03 6:04 [PATCH] target/riscv: fix amocas with rd = x0 followed by beq involving x0 is not taken when it should be
2026-07-03 5:19 [PATCH v2 6/7] migration/ram: Fix ram_save_complete() return value 8+ messages
2026-07-03 5:03 [PATCH v4 5/5] disas/riscv: Use extract helpers for operand fields 7+ messages
2026-07-03 4:24 [PATCH v2] riscv/virt: Add optional UART1 12+ messages
2026-07-02 20:36 [PATCH v2 1/1] hw/riscv/riscv-iommu.c: check for misaligned IOHGATP_PPN 5+ messages
2026-07-02 18:07 [PATCH] hw/riscv/riscv-iommu: fix MSI_PTE_M_BASIC address 2+ messages
2026-07-02 17:12 [PATCH] hw/riscv/riscv-iommu.c: update ioval2 when faulting in spa_fetch() 3+ messages
2026-07-02 13:51 [PATCH v3 06/24] target/riscv: move pmu.h to tcg subdir 43+ messages
2026-07-02 12:21 [PATCH v2] riscv/virt: Add optional UART1 2+ messages
2026-07-01 14:32 [PATCH v3 0/5] disas/riscv: Fix immediate decoding and extraction 9+ messages
2026-07-01 12:40 [PATCH] hw/riscv/riscv-iommu.c: fix fault type for spa_fetch() faults 3+ messages
2026-07-01 12:11 [PATCH v2 0/3] hw/riscv/riscv-iommu.c: additional PTE checks 11+ messages
2026-07-01 9:22 [PATCH] hw/riscv/riscv-iommu.c: set ftype and iova in riscv_iommu_ctx() 8+ messages
2026-07-01 3:04 [PATCH 02/17] accel/tcg: Constify CPUWatchpoint for debug_check_watchpoint 28+ messages
2026-07-01 1:51 [PATCH v2 3/5] disas/riscv: Use signed type for vector immediates 8+ messages
2026-06-30 21:10 [PATCH] hw/riscv/riscv-iommu.c: always fault with SADE=0 and A=0 4+ messages
2026-06-30 20:31 [PATCH] hw/riscv/riscv-iommu.c: check for misaligned IOHGATP_PPN 4+ messages
2026-06-30 17:31 Re: [RFC PATCH 1/2] accel/tcg: use GTree for faster breakpoint lookups 10+ messages
2026-06-30 17:21 [PATCH] hw/riscv/riscv-iommu: forbid GATE/SADE if caps.AMO_HWADD is zero 3+ messages
2026-06-30 10:43 [PATCH v3 0/5] Support the true Zicclsm extension 10+ messages
2026-06-30 2:49 [PATCH v10 02/12] hw/riscv/boot: Account for discontiguous memory when loading firmware 15+ messages
2026-06-30 1:09 [PATCH] hw/riscv/riscv-iommu.c: fix read fault being recorded as write 2+ messages
2026-06-29 16:59 [PATCH] hw/riscv/riscv-iommu-sys.c: record fault on IOMMU-generated MSI write 3+ messages
2026-06-29 12:57 [PATCH] hw/riscv/riscv-iommu.c: check reserved MSI PTE basic bits 3+ messages
2026-06-29 12:13 [PATCH 1/2] hw/riscv/riscv-iommu.c: check for reserved PTE bits 7+ messages
2026-06-29 10:42 [PATCH] hw/riscv/riscv-iommu: fault when !PTE_U and no priv access 2+ messages
2026-06-28 7:01 [PATCH v1] riscv/virt: Add secondary UART 3+ messages
2026-06-27 19:46 [PATCH] hw/riscv/riscv-iommu: check DC.TC reserved bits 3+ messages
2026-06-26 22:05 [PATCH] hw/riscv/riscv-iommu.c: fix MSI MRIF interrupt-pending offset 3+ messages
2026-06-26 17:33 [PATCH] hw/riscv/riscv-iommu.c: set RISCV_IOMMU_FQ_HDR_PV appropriately 3+ messages
2026-06-26 17:05 [PATCH] hw/riscv/riscv-iommu: set cmd_ill IOFENCE.C rsvp bits are set 3+ messages
2026-06-26 5:12 [PATCH v2] target/riscv: Report QEMU CPU archid as 42 4+ messages
2026-06-26 3:13 [PATCH 1/2] disas/riscv: Fix th.srri decoding 7+ messages
2026-06-25 21:08 [PATCH 2/2] hw/riscv/riscv-iommu.c: make FCTL.BE read only 0 6+ messages
2026-06-25 8:15 [PATCH v2] target/riscv: Apply UXL WARL handling to vsstatus 3+ messages
2026-06-25 6:26 [PATCH] target/riscv: Report QEMU CPU archid as 42 6+ messages
2026-06-24 9:00 [PATCH] target/riscv: Fix vsstatus.UXL reserved value 3+ messages
2026-06-24 0:06 [PATCH v2 03/24] target/riscv/machine.c: do not migrate pmp state with kvm 45+ messages
2026-06-23 11:02 [RFC PATCH v2 0/4] target/tcg: Rename some helpers common to various targets 7+ messages
2026-06-22 22:45 [PATCH] target/riscv: Generate illegal exception for inval.ir and w.inval in U-mode 2+ messages
2026-06-22 19:31 [PATCH 02/24] target/riscv: move TCG only files to tcg subdir 69+ messages
2026-06-22 11:34 [PATCH v2] target/riscv: Check PMP before updating PTE 3+ messages
2026-06-22 6:57 [PATCH v2] target/riscv/kvm: add extensions after v7.1-rc4 update 5+ messages
2026-06-22 4:35 Re: [PATCH v3] target/riscv/kvm: skip FP/Vector sync on KVM_PUT_RUNTIME_STATE 2+ messages
2026-06-22 4:12 Re: [PATCH] target/riscv: Check PMP before updating PTE 2+ messages
2026-06-21 12:46 [PATCH v3] target/riscv: raise access fault for Zicbom MMIO-like accesses 5+ messages
2026-06-19 4:48 [PATCH v9 08/12] hw/riscv/atlantis: Provide a simple halting payload 18+ messages
2026-06-18 14:06 [PATCH v2] target/riscv: raise access fault for Zicbom MMIO-like accesses 3+ messages
2026-06-18 9:38 [PATCH v2 0/4] hw/riscv/virt: Add CXL support to the RISC-V virt machine 13+ messages
2026-06-17 15:17 [PATCH] tcg/riscv: raise VLEN limit to the specification's maximum 2+ messages
2026-06-17 13:17 [PATCH v4 0/3] target/riscv: parametrize debug trigger number 5+ messages
2026-06-17 6:36 [PATCH] target/riscv/kvm: add extensions after v7.1-rc4 update 4+ messages
2026-06-17 5:39 [PATCH 0/3] riscv: Fix IMSIC CSR write and add tests 12+ messages
2026-06-16 23:59 [PATCH 1/5] hw/riscv/sifive_u.c: remove unneeded qemu_fdt_get_phandle() call 17+ messages
2026-06-16 19:01 [PATCH v3 0/5] hw/riscv: Add support for Milk-V Duo board 24+ messages
2026-06-16 15:33 [PATCH] target/riscv: raise access fault for Zicbom MMIO-like accesses 3+ messages
2026-06-15 20:37 [PATCH 04/13] hw/riscv: add create_fdt_socket_memory() helper 29+ messages
2026-06-15 13:24 [PATCH] target/riscv: avoid abort when reading vtype before env->xl is set 4+ messages
2026-06-15 13:19 [PATCH v2 1/2] hw/intc: riscv_aplic: Skip reset for KVM irqchip 6+ messages
2026-06-12 7:04 [PATCH v8 2/5] hw/riscv: add k230 board initial support 11+ messages
2026-06-12 2:35 Re: [PATCH v2 0/2] Don't insert DDT cache in Bare mode
2026-06-11 16:22 [PATCH 0/2] target/riscv/cpu.c: satp-mode=bare changes 7+ messages
2026-06-11 12:37 RISC-V Code Policy 3+ messages
2026-06-11 12:34 [PATCH v3 0/3] target/riscv: parametrize debug trigger number 11+ messages
2026-06-11 10:50 [PATCH 0/2] target/riscv: Fix mstatus.FS dirty tracking for FP exception-raising instructions 6+ messages
2026-06-11 4:22 Regular QEMU RISC-V Call 6+ messages
2026-06-11 4:04 Re: [PATCH v7 2/5] hw/riscv: add k230 board initial support 5+ messages
2026-06-10 21:41 [PATCH v8 1/7] target/riscv/cpu.c: remove 'bare' condition for .profile 31+ messages
2026-06-10 20:54 [PATCH v2 0/2] target/riscv: parametrize debug trigger number 6+ messages
2026-06-09 21:39 [PATCH] target/riscv: add 'trigger-count' debug property 8+ messages
2026-06-08 21:06 [PATCH] hw/riscv/virt.c: fix 'iommu-map' FDT entry 3+ messages
2026-06-08 6:34 [PATCH] hw/riscv/virt: Add "iommu-map" property for pcie bus 2+ messages
2026-06-06 14:55 [PATCH] disas/riscv: enable `mnret` disassembly 5+ messages
2026-06-05 11:06 [PATCH] hw/intc: riscv_aia: Skip reset for KVM irqchip 3+ messages
2026-06-04 12:00 [PATCH] hw/riscv/virt-acpi-build: Fix RINTC PLIC context ID for KVM 4+ messages
2026-06-04 9:55 Re: [RFC PATCH 01/25] target/riscv/debug: Check only mcontrol triggers for break/watchpoint matching 24+ messages
2026-06-04 9:52 [PATCH v7 2/5] target/riscv: Add server platform reference cpu 20+ messages
2026-06-03 9:53 Re: [PATCH v7 15/27] target/riscv: Fix arguments to board IMSIC emulation callbacks 3+ messages
2026-06-03 6:58 [PATCH v8 05/12] hw/riscv/aia: Configure stride for the M-mode IMSIC 28+ messages
2026-06-03 6:08 Re: [RFC PATCH 1/6] target/riscv: Add SPMP infrastructure 6+ messages
2026-06-03 1:03 Re: [PATCH] target/riscv: Reorder Smrnmi CPU fields above CPU reset line 2+ messages
2026-06-03 0:10 Re: [PATCH v4 1/2] target/riscv: Add the implied rule for G extension 2+ messages
2026-06-02 9:17 [PATCH v3 4/6] target/riscv: reject x-misa-w outside TCG 8+ messages
2026-06-02 7:41 [PATCH 2/4] hw/riscv/virt-acpi-build: Add _DEP to ACPI0017 for CXL host bridge dependency 16+ messages
2026-06-02 6:27 [PATCH v3 RESEND 0/3] riscv: AIA: Add in-kernel irqchips save and restore function support 4+ messages
2026-06-01 3:20 Re: [PATCH qemu v4 3/9] ot_uart: update register defs, switch to Fifo8 for tx/rx buffers
2026-06-01 3:16 [PATCH] hw/intc: Fix KVM VM start failure when AIA is configured as aplic-imsic 2+ messages
2026-06-01 3:08 Re: [PATCH v2 1/1] disas/riscv.c: fix inst_length() 2+ messages
2026-06-01 2:59 Re: [PATCH v6 2/4] target/riscv: Add server platform reference cpu 3+ messages
2026-05-30 10:21 [PATCH v2] target/riscv: mask vxrm csrw write to the low 2 bits 4+ messages
2026-05-30 5:32 [PATCH] target/riscv: fix invalid sstc predicate in gdbstub 2+ messages
2026-05-30 4:26 [PATCH] target/riscv: mask vxrm csrw write to the low 2 bits
2026-05-29 19:49 [PATCH v2 00/17] accel: Remove need for AccelCPUClass 23+ messages
2026-05-29 14:24 [PATCH 01/17] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header 40+ messages
2026-05-29 12:50 [PATCH v7 00/10] hw/riscv: Add the Tenstorrent Atlantis machine 11+ messages
2026-05-29 10:18 [PATCH] hw/riscv/numa.c: Supplement cpu topology arguments 3+ messages
2026-05-29 7:43 Re: [PATCH v1] target/riscv: Add mseccfg to VMStateDescription 3+ messages
2026-05-29 5:35 [PATCH 1/2] target/riscv: Print privilege level and ELP in riscv_cpu_dump_state 7+ messages
2026-05-28 19:12 Re: [PATCH v11 01/12] target/riscv: Initialize DisasContext::mo_endian once 33+ messages
2026-05-28 15:06 Re: [PATCH v3 00/14] single-binary: Compile hw/riscv once 2+ messages
2026-05-28 14:30 Re: [PATCH 09/10] target/microblaze: rename helper unaligned_access to microblaze_unaligned_access 2+ messages
2026-05-28 13:12 [PATCH v3 1/1] target/riscv: deprecate 'debug' CPU property and Debug 0.13 6+ messages
2026-05-28 11:37 Re: QEMU RISC-V Call 12+ messages
2026-05-28 9:00 Re: [PATCH v6 RESEND 0/4] hw/riscv/virt: Add acpi ged and powerdown support
2025-11-25 10:54 [PATCH-for-11.0 00/12] accel/tcg: Remove most MO_TE uses in cpu_ld/st_data() 18+ messages
2025-11-21 12:14 [PATCH v2 15/15] block/file-win32: Improve an error message 32+ messages
2025-11-21 9:08 [PATCH v1] target/riscv:Add support for RV64 Sifive U74 CPU
2025-11-21 5:04 [PATCH v2 3/6] target/riscv: Fix pointer masking PMM field selection logic 7+ messages
2025-11-20 19:13 [PATCH 04/14] qga: Use error_setg_file_open() for better error messages 34+ messages
2025-11-20 0:42 [PATCH 7/7] hw/riscv: add CBQRI controllers to virt machine 27+ messages
2025-11-19 13:08 [PATCH 3/5] nbd/client-connection: Replace error_propagate() by assignment 29+ messages
2025-11-19 11:27 [PATCH v1] target/riscv: add support for RV64 THEAD C910 CPU 2+ messages
2025-11-18 10:59 [PATCH 1/3] target/riscv: fix address masking 9+ messages
2025-11-18 8:58 [PATCH v14 03/14] target/riscv: Add MIPS P8700 CPU 16+ messages
2025-11-14 9:01 [PATCH 1/2] target/riscv: Update MISA.C for Zc* extensions 5+ messages
2025-11-14 8:43 [PATCH] hw/char: sifive_uart: Implement txctrl.txen and rxctrl.rxen
2025-11-13 17:16 [PATCH v3 3/3] target/riscv: vadc and vsbc are vm=0 instructions 4+ messages
2025-11-13 1:27 [PATCH v4 RESEND 0/2] hw/riscv/virt: Add acpi ged and powerdown support 5+ messages
2025-11-12 16:29 [PATCH v5] Add RISCV ZALASR extension 2+ messages
2025-11-12 13:41 [PATCH v3 09/10] hw/char: Simplify when qemu_chr_fe_write() could not write
2025-11-12 6:49 [PATCH v4 6/6] target/riscv: Enable SMMPT extension 7+ messages
2025-11-12 6:40 [PATCH v3 6/6] target/riscv: Enable SMMPT extension 7+ messages
2025-11-11 18:29 [PATCH v4 0/5] hw/riscv: Experimental Server Platform Reference Board 18+ messages
2025-11-11 11:46 [PATCH v2 00/17] hw/riscv, target/riscv: initial e-trace support 21+ messages
2025-11-10 9:05 [PATCH v2] Add RISCV Zilsd extension 5+ messages
2025-11-09 19:15 [PATCH v4 1/5] target/riscv: add NEORV32 RV32 CPU type and vendor CSR hooks 11+ messages
2025-11-07 10:23 [PATCH 3/9] hw/intc/riscv_aclint: rename cpu_riscv_read_rtc to riscv_aclint_mtimer_get_ticks 22+ messages
2025-11-07 2:31 [PATCH v2] target/riscv: Support Smpmpmt extension
2025-11-06 11:20 [PATCH 0/2] riscv: riscv,isa fixes + check script 5+ messages
2025-11-05 18:50 [PATCH v3 0/5] RISC-V: NEORV32 CPU, peripherials, and machine 8+ messages
2025-11-05 13:43 [PATCH] target/riscv: Fix PC sync in trans_sspopchk for CFI exception handling
2025-11-05 7:18 [PATCH] target/riscv: Add bfloat16 and half-float support to GDB stub
2025-11-05 7:03 [PATCH] target/riscv: Add bfloat16 and half-float support to GDB stub
2025-11-04 15:07 [PATCH v1 0/1] riscv: Update MIPS vendor id 6+ messages
2025-11-04 11:59 [PATCH] Add RISCV Zilsd extension 5+ messages
2025-11-04 7:26 [PATCH v1] target/riscv: Support Smpmpmt extension 2+ messages
2025-11-03 10:17 [PATCH v4 1/1] Add RISCV ZALASR extension 3+ messages
2025-11-03 3:37 [PATCH 0/8] single-binary: Make riscv cpu.h target partially independent 12+ messages
2025-10-29 7:17 [PATCH 2/2] hw/intc/riscv_aplic: Factor out source_active() and remove duplicate checks 8+ messages
2025-10-28 8:50 [PATCH] hw/riscv: riscv-iommu: Don't look up DDT cache in Off and Bare modes 5+ messages
2025-10-27 10:09 [PATCH v2 0/5] RISC-V: NEORV32 CPU, devices, and machine 18+ messages
2025-10-21 15:55 [PATCH v3 03/18] accel/tcg: memory access from CPU will pass access_type to IOMMU 23+ messages
2025-10-10 15:50 [PATCH 01/13] target/riscv: Really use little endianness for 128-bit loads/stores 44+ messages
2025-09-18 6:19 [PATCH v2 0/6] target/riscv: Implement Smsdid and Smmpt extension 14+ messages
2024-12-31 3:26 [PATCH v11 0/6] Add Smrnmi support 15+ messages
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