From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1uHOZ4-0000Sl-6G for mharc-qemu-rust@gnu.org; Tue, 20 May 2025 11:07:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uHOYX-00082R-J3; Tue, 20 May 2025 11:07:02 -0400 Received: from mgamail.intel.com ([198.175.65.11]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uHOYV-0002za-At; Tue, 20 May 2025 11:07:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1747753619; x=1779289619; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3RBFjERbwhb5Xh3MrVm39LFBMvkfvGUr1I2713Qs3Eo=; b=NQXOWH1tXQP/GWdMsCXwQjcGTD0oOOhOUHOBeaMPuIZgpWgEgqZMnz/e kaSJujQrRziDWS69WvmhUwFy0qLRd9pm/ZTmdEdMxqvLkthf4BCC6tIyq f/J6xWd24V84xDhvc7xl9FPEa8CFuQ4oRi5hE9V6VBnjhc4umKruUOKKC 9MJAqyEnythDRX5ilJydtMGSmvuR54kyv5nCvUBsreODoNO47u/ZDFg5U U40lNzLXjz/4OZBNd4pfLab2rIE/syQ1DnwFBWND0NSg1VJ/dnyY5BqVB bTSQXgHtoKn6wVQK0hTJlABLqBWmzZvvxj4/nJlU6s1PtAQN3OhYDhRIC A==; X-CSE-ConnectionGUID: yV2/xn3+S36xX7ewTJ63qg== X-CSE-MsgGUID: pjuQnyayTXetRBmOd7oIQw== X-IronPort-AV: E=McAfee;i="6700,10204,11439"; a="59922537" X-IronPort-AV: E=Sophos;i="6.15,302,1739865600"; d="scan'208";a="59922537" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2025 08:06:57 -0700 X-CSE-ConnectionGUID: X7YEE3/ATi+In5SuXPV4kg== X-CSE-MsgGUID: +q1xE8LBQ6ehbwEon2jClg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,302,1739865600"; d="scan'208";a="144461880" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa003.jf.intel.com with ESMTP; 20 May 2025 08:06:48 -0700 From: Zhao Liu To: Paolo Bonzini Cc: qemu-devel@nongnu.org, qemu-rust@nongnu.org, Dapeng Mi , Zhao Liu Subject: [PATCH 3/5] rust/hpet: Drop BalCell wrapper for num_timers Date: Tue, 20 May 2025 23:27:48 +0800 Message-Id: <20250520152750.2542612-4-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250520152750.2542612-1-zhao1.liu@intel.com> References: <20250520152750.2542612-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=198.175.65.11; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -48 X-Spam_score: -4.9 X-Spam_bar: ---- X-Spam_report: (-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.487, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-rust@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: QEMU Rust-related patches and discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 May 2025 15:07:07 -0000 Currently, HPET adjusts num_timers in HPETState::realize(), and doesn't change it in any other method. And this field is initialized as a property. Meanwhile, please note that as a property, someone may change its default value in the future using qdev_prop_set_uint8() binding on either the C side or Rust side after HPET object creation. However, since this depends on QOM core code (on the C side) and all subsequent processes occur on the C side, there's no need for additional safety considerations as it doesn't cross FFI boundaries. Therefore, this field could be immutable after init() so as not to be necessary to have a BqlCell wrapper. Adjust num_timers in HPETState::init() and drop the BqlCell wrapper. Note, when num_timers came out of BqlCell, the capability field doesn't need BqlCell as well since it's read-only. But from the view of readability, it's best to keep consistent with the other registers. Signed-off-by: Zhao Liu --- rust/hw/timer/hpet/src/hpet.rs | 37 +++++++++++++++------------------- 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/rust/hw/timer/hpet/src/hpet.rs b/rust/hw/timer/hpet/src/hpet.rs index 779681d65099..6cc6fa0aeda0 100644 --- a/rust/hw/timer/hpet/src/hpet.rs +++ b/rust/hw/timer/hpet/src/hpet.rs @@ -562,7 +562,7 @@ pub struct HPETState { /// HPET timer array managed by this timer block. #[doc(alias = "timer")] timers: [BqlRefCell; HPET_MAX_TIMERS as usize], - num_timers: BqlCell, + num_timers: u8, num_timers_save: BqlCell, /// Instance id (HPET timer block ID). @@ -570,11 +570,6 @@ pub struct HPETState { } impl HPETState { - // Get num_timers with `usize` type, which is useful to play with array index. - fn get_num_timers(&self) -> usize { - self.num_timers.get().into() - } - const fn has_msi_flag(&self) -> bool { self.flags & (1 << HPET_FLAG_MSI_SUPPORT_SHIFT) != 0 } @@ -636,7 +631,7 @@ fn set_cfg_reg(&self, shift: u32, len: u32, val: u64) { self.hpet_offset .set(ticks_to_ns(self.counter.get()) - CLOCK_VIRTUAL.get_ns()); - for timer in self.timers.iter().take(self.get_num_timers()) { + for timer in self.timers.iter().take(self.num_timers.into()) { let mut t = timer.borrow_mut(); if t.is_int_enabled() && t.is_int_active() { @@ -648,7 +643,7 @@ fn set_cfg_reg(&self, shift: u32, len: u32, val: u64) { // Halt main counter and disable interrupt generation. self.counter.set(self.get_ticks()); - for timer in self.timers.iter().take(self.get_num_timers()) { + for timer in self.timers.iter().take(self.num_timers.into()) { timer.borrow_mut().del_timer(); } } @@ -671,7 +666,7 @@ fn set_int_status_reg(&self, shift: u32, _len: u32, val: u64) { let new_val = val << shift; let cleared = new_val & self.int_status.get(); - for (index, timer) in self.timers.iter().take(self.get_num_timers()).enumerate() { + for (index, timer) in self.timers.iter().take(self.num_timers.into()).enumerate() { if cleared & (1 << index) != 0 { timer.borrow_mut().update_irq(false); } @@ -715,6 +710,12 @@ unsafe fn init(&mut self) { "hpet", HPET_REG_SPACE_LEN, ); + + if self.num_timers < HPET_MIN_TIMERS { + self.num_timers = HPET_MIN_TIMERS; + } else if self.num_timers > HPET_MAX_TIMERS { + self.num_timers = HPET_MAX_TIMERS; + } } fn post_init(&self) { @@ -732,12 +733,6 @@ fn realize(&self) { self.hpet_id.set(HPETFwConfig::assign_hpet_id()); - if self.num_timers.get() < HPET_MIN_TIMERS { - self.num_timers.set(HPET_MIN_TIMERS); - } else if self.num_timers.get() > HPET_MAX_TIMERS { - self.num_timers.set(HPET_MAX_TIMERS); - } - self.init_timer(); // 64-bit General Capabilities and ID Register; LegacyReplacementRoute. self.capability.set( @@ -745,7 +740,7 @@ fn realize(&self) { 1 << HPET_CAP_COUNT_SIZE_CAP_SHIFT | 1 << HPET_CAP_LEG_RT_CAP_SHIFT | HPET_CAP_VENDER_ID_VALUE << HPET_CAP_VENDER_ID_SHIFT | - ((self.get_num_timers() - 1) as u64) << HPET_CAP_NUM_TIM_SHIFT | // indicate the last timer + ((self.num_timers - 1) as u64) << HPET_CAP_NUM_TIM_SHIFT | // indicate the last timer (HPET_CLK_PERIOD * FS_PER_NS) << HPET_CAP_CNT_CLK_PERIOD_SHIFT, // 10 ns ); @@ -754,7 +749,7 @@ fn realize(&self) { } fn reset_hold(&self, _type: ResetType) { - for timer in self.timers.iter().take(self.get_num_timers()) { + for timer in self.timers.iter().take(self.num_timers.into()) { timer.borrow_mut().reset(); } @@ -782,7 +777,7 @@ fn decode(&self, mut addr: hwaddr, size: u32) -> HPETAddrDecode { GlobalRegister::try_from(addr).map(HPETRegister::Global) } else { let timer_id: usize = ((addr - 0x100) / 0x20) as usize; - if timer_id <= self.get_num_timers() { + if timer_id <= self.num_timers.into() { // TODO: Add trace point - trace_hpet_ram_[read|write]_timer_id(timer_id) TimerRegister::try_from(addr & 0x18) .map(|reg| HPETRegister::Timer(&self.timers[timer_id], reg)) @@ -853,12 +848,12 @@ fn pre_save(&self) -> i32 { * also added to the migration stream. Check that it matches the value * that was configured. */ - self.num_timers_save.set(self.num_timers.get()); + self.num_timers_save.set(self.num_timers); 0 } fn post_load(&self, _version_id: u8) -> i32 { - for timer in self.timers.iter().take(self.get_num_timers()) { + for timer in self.timers.iter().take(self.num_timers.into()) { let mut t = timer.borrow_mut(); t.cmp64 = t.calculate_cmp64(t.get_state().counter.get(), t.cmp); @@ -883,7 +878,7 @@ fn is_offset_needed(&self) -> bool { } fn validate_num_timers(&self, _version_id: u8) -> bool { - self.num_timers.get() == self.num_timers_save.get() + self.num_timers == self.num_timers_save.get() } } -- 2.34.1