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[79.129.177.117]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63e3ebb328esm3446636a12.5.2025.10.24.00.06.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Oct 2025 00:06:33 -0700 (PDT) Date: Fri, 24 Oct 2025 09:59:37 +0300 From: Manos Pitsidianakis To: Zhao Liu , Paolo Bonzini Cc: qemu-devel@nongnu.org, qemu-rust@nongnu.org, Zhao Liu Subject: Re: [PATCH v2] rust/qemu-macros: Convert bit value to u8 within #[property] User-Agent: meli/0.8.12 References: <20251024041344.1389488-1-zhao1.liu@intel.com> In-Reply-To: <20251024041344.1389488-1-zhao1.liu@intel.com> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=manos.pitsidianakis@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-rust@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: QEMU Rust-related patches and discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-rust-bounces+qemu-rust=archiver.kernel.org@nongnu.org Sender: qemu-rust-bounces+qemu-rust=archiver.kernel.org@nongnu.org On Fri, 24 Oct 2025 07:13, Zhao Liu wrote: >For bit property, make the type conversion within the #[property] macro >so that users do not need to handle the conversion. > >Suggested-by: Paolo Bonzini >Signed-off-by: Zhao Liu >--- >Changes Since v2: > - Check #field_ty::BITS instead of u8::MAX. > - Update test cases. >--- LGTM, some questions... > rust/hw/timer/hpet/src/device.rs | 2 +- > rust/qemu-macros/src/lib.rs | 23 ++++++++++++++++++----- > rust/qemu-macros/src/tests.rs | 15 ++++++++++++--- > 3 files changed, 31 insertions(+), 9 deletions(-) > >diff --git a/rust/hw/timer/hpet/src/device.rs b/rust/hw/timer/hpet/src/device.rs >index 86638c076666..23f2eefd1cd9 100644 >--- a/rust/hw/timer/hpet/src/device.rs >+++ b/rust/hw/timer/hpet/src/device.rs >@@ -539,7 +539,7 @@ pub struct HPETState { > // Internal state > /// Capabilities that QEMU HPET supports. > /// bit 0: MSI (or FSB) support. >- #[property(rename = "msi", bit = HPET_FLAG_MSI_SUPPORT_SHIFT as u8, default = false)] >+ #[property(rename = "msi", bit = HPET_FLAG_MSI_SUPPORT_SHIFT, default = false)] > flags: u32, > > /// Offset of main counter relative to qemu clock. >diff --git a/rust/qemu-macros/src/lib.rs b/rust/qemu-macros/src/lib.rs >index 50239f228be2..ee417bb4b4ef 100644 >--- a/rust/qemu-macros/src/lib.rs >+++ b/rust/qemu-macros/src/lib.rs >@@ -262,12 +262,25 @@ macro_rules! str_to_c_str { > }, > )?; > let field_ty = field.ty.clone(); >- let qdev_prop = if bitnr.is_none() { >- quote! { <#field_ty as ::hwcore::QDevProp>::BASE_INFO } >+ let (qdev_prop, bitval) = if let Some(bitval) = bitnr { >+ ( >+ quote! { <#field_ty as ::hwcore::QDevProp>::BIT_INFO }, >+ quote! { >+ { >+ const { >+ assert!(#bitval >= 0 && #bitval < #field_ty::BITS as _, >+ "bit number exceeds type bits >range"); Const panic messages cannot use formatting parameters yet, but. Can we interpolate the type (e.g u32) in the compile-time panic message? Not important but would make the error message friendlier. Reviewed-by: Manos Pitsidianakis >+ } >+ #bitval as u8 >+ } >+ }, >+ ) > } else { >- quote! { <#field_ty as ::hwcore::QDevProp>::BIT_INFO } >+ ( >+ quote! { <#field_ty as ::hwcore::QDevProp>::BASE_INFO }, >+ quote! { 0 }, >+ ) > }; >- let bitnr = bitnr.unwrap_or(syn::Expr::Verbatim(quote! { 0 })); > let set_default = defval.is_some(); > let defval = defval.unwrap_or(syn::Expr::Verbatim(quote! { 0 })); > properties_expanded.push(quote! { >@@ -275,7 +288,7 @@ macro_rules! str_to_c_str { > name: ::std::ffi::CStr::as_ptr(#prop_name), > info: #qdev_prop, > offset: ::core::mem::offset_of!(#name, #field_name) as isize, >- bitnr: #bitnr, >+ bitnr: #bitval, > set_default: #set_default, > defval: ::hwcore::bindings::Property__bindgen_ty_1 { u: #defval as u64 }, > ..::common::Zeroable::ZERO >diff --git a/rust/qemu-macros/src/tests.rs b/rust/qemu-macros/src/tests.rs >index 65691412ff57..b65cf656fa36 100644 >--- a/rust/qemu-macros/src/tests.rs >+++ b/rust/qemu-macros/src/tests.rs >@@ -179,7 +179,10 @@ unsafe impl ::hwcore::DevicePropertiesImpl for DummyState { > name: ::std::ffi::CStr::as_ptr(c"flags"), > info: ::BIT_INFO, > offset: ::core::mem::offset_of!(DummyState, flags) as isize, >- bitnr: 3, >+ bitnr : { >+ const { assert!(3 >= 0 && 3 < u32::BITS as _ , "bit number exceeds type bits range"); } >+ 3 as u8 >+ }, > set_default: false, > defval: ::hwcore::bindings::Property__bindgen_ty_1 { u: 0 as u64 }, > ..::common::Zeroable::ZERO >@@ -207,7 +210,10 @@ unsafe impl ::hwcore::DevicePropertiesImpl for DummyState { > name: ::std::ffi::CStr::as_ptr(c"flags"), > info: ::BIT_INFO, > offset: ::core::mem::offset_of!(DummyState, flags) as isize, >- bitnr: 3, >+ bitnr : { >+ const { assert!(3 >= 0 && 3 < u32::BITS as _ , "bit number exceeds type bits range"); } >+ 3 as u8 >+ }, > set_default: true, > defval: ::hwcore::bindings::Property__bindgen_ty_1 { u: true as u64 }, > ..::common::Zeroable::ZERO >@@ -235,7 +241,10 @@ unsafe impl ::hwcore::DevicePropertiesImpl for DummyState { > name: ::std::ffi::CStr::as_ptr(c"msi"), > info: ::BIT_INFO, > offset: ::core::mem::offset_of!(DummyState, flags) as isize, >- bitnr: 3, >+ bitnr : { >+ const { assert!(3 >= 0 && 3 < u64::BITS as _ , "bit number exceeds type bits range"); } >+ 3 as u8 >+ }, > set_default: true, > defval: ::hwcore::bindings::Property__bindgen_ty_1 { u: false as u64 }, > ..::common::Zeroable::ZERO >-- >2.34.1 >