From: Maksim Ratnikov <m.o.ratnikov@gmail.com>
To: qemu-trivial@nongnu.org
Subject: Re: [Qemu-trivial] [PATCH] SMBUS module update.
Date: Sun, 28 Apr 2013 22:26:36 +0400 [thread overview]
Message-ID: <CAAWx3aSdhAdZfPiKodbCo6sHhHPX4kk1_yZ6h1j4PU8EyNBQFg@mail.gmail.com> (raw)
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Previous realization doesn't consider flags in the status register.
Add DS and INTR bits of HST_STS register set after transaction execution.
Update bits resetting in HST_STS register. Update error processing: if
DEV_ERR bit are set
transaction isn't execution.
Signed-off-by: Maksim_Ratnikov <m.o.ratnikov@gmail.com>
---
hw/i2c/pm_smbus.c | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index 0b5bb89..d5f5c56 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -50,9 +50,16 @@ static void smb_transaction(PMSMBus *s)
i2c_bus *bus = s->smbus;
SMBUS_DPRINTF("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot);
+ /* Transaction isn't exec if DEV_ERR bit set */
+ if ((s->smb_stat & 0x04) != 0)
+ goto error;
switch(prot) {
case 0x0:
smbus_quick_command(bus, addr, read);
+ /* Set successfully transaction end:
+ * ByteDoneStatus = 1 (HST_STS bit #7) and INTR = 1 (HST_STS bit
#1)
+ */
+ s->smb_stat |= 0x82;
break;
case 0x1:
if (read) {
@@ -60,6 +67,7 @@ static void smb_transaction(PMSMBus *s)
} else {
smbus_send_byte(bus, addr, cmd);
}
+ s->smb_stat |= 0x82;
break;
case 0x2:
if (read) {
@@ -67,6 +75,7 @@ static void smb_transaction(PMSMBus *s)
} else {
smbus_write_byte(bus, addr, cmd, s->smb_data0);
}
+ s->smb_stat |= 0x82;
break;
case 0x3:
if (read) {
@@ -77,6 +86,7 @@ static void smb_transaction(PMSMBus *s)
} else {
smbus_write_word(bus, addr, cmd, (s->smb_data1 << 8) |
s->smb_data0);
}
+ s->smb_stat |= 0x82;
break;
case 0x5:
if (read) {
@@ -84,6 +94,7 @@ static void smb_transaction(PMSMBus *s)
} else {
smbus_write_block(bus, addr, cmd, s->smb_data, s->smb_data0);
}
+ s->smb_stat |= 0x82;
break;
default:
goto error;
@@ -102,7 +113,7 @@ static void smb_ioport_writeb(void *opaque, hwaddr
addr, uint64_t val,
SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
switch(addr) {
case SMBHSTSTS:
- s->smb_stat = 0;
+ s->smb_stat = (~(val & 0xff)) & s->smb_stat;
s->smb_index = 0;
break;
case SMBHSTCNT:
--
1.7.3.4
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next reply other threads:[~2013-04-28 18:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-28 18:26 Maksim Ratnikov [this message]
2013-04-30 19:03 ` [Qemu-trivial] [PATCH] SMBUS module update Michael Tokarev
-- strict thread matches above, loose matches on Subject: below --
2013-04-24 22:20 Maksim Ratnikov
2013-04-26 10:06 ` Stefan Hajnoczi
2013-04-26 10:07 ` Stefan Hajnoczi
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