* [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups
@ 2021-01-31 10:59 Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Philippe Mathieu-Daudé
` (6 more replies)
0 siblings, 7 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé
Trivial bugfixes and cleanup patches noticed while rebasing
my "Support disabling TCG on ARM (part 2)" series.
Since v1:
- added patches to remove 64-bit specific features on 32-bit build.
Philippe Mathieu-Daudé (7):
hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
hw/arm/exynos4210: Add missing dependency on OR_IRQ
hw/arm/xlnx-versal: Versal SoC requires ZDMA
hw/arm/virt: Do not include 64-bit CPUs in 32-bit build
hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build
hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 board to 64-bit build
hw/arm: Display CPU type in machine description
hw/arm/digic_boards.c | 2 +-
hw/arm/microbit.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/netduinoplus2.c | 2 +-
hw/arm/orangepi.c | 2 +-
hw/arm/stellaris.c | 4 ++--
hw/arm/virt.c | 2 ++
hw/arm/Kconfig | 4 ++++
hw/arm/meson.build | 4 ++--
hw/dma/Kconfig | 3 +++
hw/dma/meson.build | 2 +-
11 files changed, 19 insertions(+), 10 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-02-01 15:16 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 2/7] hw/arm/exynos4210: " Philippe Mathieu-Daudé
` (5 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé
The STM32F405 SoC uses an OR gate on its ADC IRQs.
Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: alistair@alistair23.me
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 13cc42dcc84..a320a124855 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -336,6 +336,7 @@ config STM32F205_SOC
config STM32F405_SOC
bool
select ARM_V7M
+ select OR_IRQ
select STM32F4XX_SYSCFG
select STM32F4XX_EXTI
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 2/7] hw/arm/exynos4210: Add missing dependency on OR_IRQ
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA Philippe Mathieu-Daudé
` (4 subsequent siblings)
6 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé, Igor Mitsyanko
The Exynos4210 SoC uses an OR gate on the PL330 IRQ lines.
Fixes: dab15fbe2ab ("hw/arm/exynos4210: Fix DMA initialization")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Igor Mitsyanko <i.mitsyanko@gmail.com>
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index a320a124855..223016bb4e8 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -52,6 +52,7 @@ config EXYNOS4
select PTIMER
select SDHCI
select USB_EHCI_SYSBUS
+ select OR_IRQ
config HIGHBANK
bool
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 2/7] hw/arm/exynos4210: " Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-02-01 15:17 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build Philippe Mathieu-Daudé
` (3 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé, Edgar E. Iglesias
The Versal SoC instantiates the TYPE_XLNX_ZDMA object in
versal_create_admas(). Introduce the XLNX_ZDMA configuration
and select it to fix:
$ qemu-system-aarch64 -M xlnx-versal-virt ...
qemu-system-aarch64: missing object type 'xlnx.zdma'
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Alistair Francis <alistair@alistair23.me>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
---
hw/arm/Kconfig | 2 ++
hw/dma/Kconfig | 3 +++
hw/dma/meson.build | 2 +-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 223016bb4e8..09298881f2f 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -354,6 +354,7 @@ config XLNX_ZYNQMP_ARM
select XILINX_AXI
select XILINX_SPIPS
select XLNX_ZYNQMP
+ select XLNX_ZDMA
config XLNX_VERSAL
bool
@@ -362,6 +363,7 @@ config XLNX_VERSAL
select CADENCE
select VIRTIO_MMIO
select UNIMP
+ select XLNX_ZDMA
config NPCM7XX
bool
diff --git a/hw/dma/Kconfig b/hw/dma/Kconfig
index d67492d36c1..5d6be1a7a7a 100644
--- a/hw/dma/Kconfig
+++ b/hw/dma/Kconfig
@@ -18,6 +18,9 @@ config ZYNQ_DEVCFG
bool
select REGISTER
+config XLNX_ZDMA
+ bool
+
config STP2000
bool
diff --git a/hw/dma/meson.build b/hw/dma/meson.build
index b991d7698c7..47b4a7cb47b 100644
--- a/hw/dma/meson.build
+++ b/hw/dma/meson.build
@@ -9,7 +9,7 @@
softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
softmmu_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zdma.c'))
+softmmu_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-01-31 10:59 ` [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-02-01 15:29 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build Philippe Mathieu-Daudé
` (2 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé
Similarly to commit 210f47840dd, remove 64-bit CPUs (which have
never been available on 32-bit build, see commit d14d42f19bf),
to fix:
$ make check-qtest-arm
...
Running test qtest-arm/device-introspect-test
missing object type 'cortex-a53-arm-cpu'
Broken pipe
../tests/qtest/libqtest.c:181: kill_qemu() detected QEMU death from signal 6 (Aborted) (core dumped)
ERROR qtest-arm/device-introspect-test - too few tests run (expected 6, got 5)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 399da734548..f0e9d7dd7d8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -199,9 +199,11 @@ static const int a15irqmap[] = {
static const char *valid_cpus[] = {
ARM_CPU_TYPE_NAME("cortex-a7"),
ARM_CPU_TYPE_NAME("cortex-a15"),
+#ifdef TARGET_AARCH64
ARM_CPU_TYPE_NAME("cortex-a53"),
ARM_CPU_TYPE_NAME("cortex-a57"),
ARM_CPU_TYPE_NAME("cortex-a72"),
+#endif /* TARGET_AARCH64 */
ARM_CPU_TYPE_NAME("host"),
ARM_CPU_TYPE_NAME("max"),
};
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2021-01-31 10:59 ` [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 " Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 7/7] hw/arm: Display CPU type in machine description Philippe Mathieu-Daudé
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé, Radoslaw Biernacki,
Leif Lindholm
The SBSA-ref board only use CPUs available in the 64-bit build,
it is pointless to have it available in the 32-bit build.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Radoslaw Biernacki <rad@semihalf.com>
Cc: Leif Lindholm <leif@nuviainc.com>
---
hw/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index be39117b9b6..059ff7382f2 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -22,7 +22,7 @@
arm_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
arm_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c'))
arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
-arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
+arm_ss.add(when: ['CONFIG_SBSA_REF', 'TARGET_AARCH64'], if_true: files('sbsa-ref.c'))
arm_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c'))
arm_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c'))
arm_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c'))
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 board to 64-bit build
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2021-01-31 10:59 ` [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 7/7] hw/arm: Display CPU type in machine description Philippe Mathieu-Daudé
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé, Edgar E. Iglesias
The ZynqMP ZCU102 board only use the Cortex-A53 CPU, which
is only available in the 64-bit build. It is pointless to
have this board present in the 32-bit build where this CPU
is not available.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Alistair Francis <alistair@alistair23.me>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
---
hw/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 059ff7382f2..345099f5a1b 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -41,7 +41,7 @@
arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c', 'bcm2836.c', 'raspi.c'))
arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
-arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
+arm_ss.add(when: ['CONFIG_XLNX_ZYNQMP_ARM', 'TARGET_AARCH64'], if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))
arm_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-imx25.c', 'imx25_pdk.c'))
arm_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'))
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 7/7] hw/arm: Display CPU type in machine description
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2021-01-31 10:59 ` [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 " Philippe Mathieu-Daudé
@ 2021-01-31 10:59 ` Philippe Mathieu-Daudé
2021-02-01 15:17 ` Alistair Francis
6 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 10:59 UTC (permalink / raw)
To: qemu-devel
Cc: Antony Pavlov, Joel Stanley, Peter Maydell, qemu-arm,
qemu-trivial, Alistair Francis, Niek Linnenbank, Laurent Vivier,
Michael Tokarev, Philippe Mathieu-Daudé
Most of ARM machines display their CPU when QEMU list the available
machines (-M help). Some machines do not. Fix to unify the help
output.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/digic_boards.c | 2 +-
hw/arm/microbit.c | 2 +-
hw/arm/netduino2.c | 2 +-
hw/arm/netduinoplus2.c | 2 +-
hw/arm/orangepi.c | 2 +-
hw/arm/stellaris.c | 4 ++--
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index be12873673b..6cdc1d83fca 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -142,7 +142,7 @@ static void canon_a1100_init(MachineState *machine)
static void canon_a1100_machine_init(MachineClass *mc)
{
- mc->desc = "Canon PowerShot A1100 IS";
+ mc->desc = "Canon PowerShot A1100 IS (ARM946)";
mc->init = &canon_a1100_init;
mc->ignore_memory_transaction_failures = true;
mc->default_ram_size = 64 * MiB;
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index 0947491cb97..e9494334ce7 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -64,7 +64,7 @@ static void microbit_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
- mc->desc = "BBC micro:bit";
+ mc->desc = "BBC micro:bit (Cortex-M0)";
mc->init = microbit_init;
mc->max_cpus = 1;
}
diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index 8f103341443..1733b71507c 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -54,7 +54,7 @@ static void netduino2_init(MachineState *machine)
static void netduino2_machine_init(MachineClass *mc)
{
- mc->desc = "Netduino 2 Machine";
+ mc->desc = "Netduino 2 Machine (Cortex-M3)";
mc->init = netduino2_init;
mc->ignore_memory_transaction_failures = true;
}
diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
index 68abd3ec69d..d3ad7a2b675 100644
--- a/hw/arm/netduinoplus2.c
+++ b/hw/arm/netduinoplus2.c
@@ -55,7 +55,7 @@ static void netduinoplus2_init(MachineState *machine)
static void netduinoplus2_machine_init(MachineClass *mc)
{
- mc->desc = "Netduino Plus 2 Machine";
+ mc->desc = "Netduino Plus 2 Machine (Cortex-M4)";
mc->init = netduinoplus2_init;
}
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index d6306dfddae..40cdb5c6d2c 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -113,7 +113,7 @@ static void orangepi_init(MachineState *machine)
static void orangepi_machine_init(MachineClass *mc)
{
- mc->desc = "Orange Pi PC";
+ mc->desc = "Orange Pi PC (Cortex-A7)";
mc->init = orangepi_init;
mc->block_default_type = IF_SD;
mc->units_per_default_bus = 1;
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index ad72c0959f1..27292ec4113 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1538,7 +1538,7 @@ static void lm3s811evb_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
- mc->desc = "Stellaris LM3S811EVB";
+ mc->desc = "Stellaris LM3S811EVB (Cortex-M3)";
mc->init = lm3s811evb_init;
mc->ignore_memory_transaction_failures = true;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
@@ -1554,7 +1554,7 @@ static void lm3s6965evb_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
- mc->desc = "Stellaris LM3S6965EVB";
+ mc->desc = "Stellaris LM3S6965EVB (Cortex-M3)";
mc->init = lm3s6965evb_init;
mc->ignore_memory_transaction_failures = true;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
--
2.26.2
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build
2021-01-31 10:59 ` [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build Philippe Mathieu-Daudé
@ 2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 15:31 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 12:31 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Radoslaw Biernacki, qemu-trivial, Alistair Francis,
Michael Tokarev, Laurent Vivier, Niek Linnenbank, qemu-arm,
Antony Pavlov, Leif Lindholm, Joel Stanley
On 1/31/21 11:59 AM, Philippe Mathieu-Daudé wrote:
> The SBSA-ref board only use CPUs available in the 64-bit build,
> it is pointless to have it available in the 32-bit build.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Cc: Radoslaw Biernacki <rad@semihalf.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> ---
> hw/arm/meson.build | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
> index be39117b9b6..059ff7382f2 100644
> --- a/hw/arm/meson.build
> +++ b/hw/arm/meson.build
> @@ -22,7 +22,7 @@
> arm_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
> arm_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c'))
> arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
> -arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
> +arm_ss.add(when: ['CONFIG_SBSA_REF', 'TARGET_AARCH64'], if_true: files('sbsa-ref.c'))
Please disregard this patch, it shows that my other patch
"meson: Introduce target-specific Kconfig" is incorrect:
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg07989.html
Probably because per docs/devel/kconfig.rst "devices are usually
``default y`` if and only if they have at least one ``depends on``".
I'll try another approach such:
-- >8 --
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -227,6 +227,8 @@ config REALVIEW
config SBSA_REF
bool
+ default y
+ depends on AARCH64
imply PCI_DEVICES
select AHCI
select ARM_SMMUV3
---
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 board to 64-bit build
2021-01-31 10:59 ` [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 " Philippe Mathieu-Daudé
@ 2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 15:30 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 12:31 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, qemu-trivial, Alistair Francis, Michael Tokarev,
Laurent Vivier, Niek Linnenbank, qemu-arm, Antony Pavlov,
Edgar E. Iglesias, Joel Stanley
On 1/31/21 11:59 AM, Philippe Mathieu-Daudé wrote:
> The ZynqMP ZCU102 board only use the Cortex-A53 CPU, which
> is only available in the 64-bit build. It is pointless to
> have this board present in the 32-bit build where this CPU
> is not available.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Cc: Alistair Francis <alistair@alistair23.me>
> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
> ---
> hw/arm/meson.build | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
> index 059ff7382f2..345099f5a1b 100644
> --- a/hw/arm/meson.build
> +++ b/hw/arm/meson.build
> @@ -41,7 +41,7 @@
> arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c', 'bcm2836.c', 'raspi.c'))
> arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
> arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
> -arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
> +arm_ss.add(when: ['CONFIG_XLNX_ZYNQMP_ARM', 'TARGET_AARCH64'], if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
Please disregard this patch, it shows that my other patch
"meson: Introduce target-specific Kconfig" is incorrect:
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg07989.html
Probably because per docs/devel/kconfig.rst "devices are usually
``default y`` if and only if they have at least one ``depends on``".
I'll try another approach such:
-- >8 --
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -389,6 +391,8 @@ config XLNX_ZYNQMP_ARM
config XLNX_VERSAL
bool
+ default y
+ depends on AARCH64
select ARM_GIC
select PL011
select CADENCE
---
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 board to 64-bit build
2021-01-31 12:31 ` Philippe Mathieu-Daudé
@ 2021-01-31 15:30 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 15:30 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, qemu-trivial, Alistair Francis, Michael Tokarev,
Laurent Vivier, Niek Linnenbank, qemu-arm, Antony Pavlov,
Joel Stanley
On 1/31/21 1:31 PM, Philippe Mathieu-Daudé wrote:
> On 1/31/21 11:59 AM, Philippe Mathieu-Daudé wrote:
>> The ZynqMP ZCU102 board only use the Cortex-A53 CPU, which
>> is only available in the 64-bit build. It is pointless to
>> have this board present in the 32-bit build where this CPU
>> is not available.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Cc: Alistair Francis <alistair@alistair23.me>
>> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
>> ---
>> hw/arm/meson.build | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
>> index 059ff7382f2..345099f5a1b 100644
>> --- a/hw/arm/meson.build
>> +++ b/hw/arm/meson.build
>> @@ -41,7 +41,7 @@
>> arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c', 'bcm2836.c', 'raspi.c'))
>> arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c'))
>> arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c'))
>> -arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
>> +arm_ss.add(when: ['CONFIG_XLNX_ZYNQMP_ARM', 'TARGET_AARCH64'], if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c'))
>
> Please disregard this patch, it shows that my other patch
> "meson: Introduce target-specific Kconfig" is incorrect:
> https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg07989.html
> Probably because per docs/devel/kconfig.rst "devices are usually
> ``default y`` if and only if they have at least one ``depends on``".
The problem is the XLNX_ZYNQMP_ARM was incorrectly selected,
enabling AARCH64.
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg08014.html
With this change there is no problem (and this patch is not necessary):
config XLNX_ZYNQMP_ARM
bool
- default y if TCG && ARM
+ default y if TCG && AARCH64
Regards,
Phil.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build
2021-01-31 12:31 ` Philippe Mathieu-Daudé
@ 2021-01-31 15:31 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 15:31 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Alistair Francis, qemu-trivial, Radoslaw Biernacki,
Michael Tokarev, Laurent Vivier, Niek Linnenbank, qemu-arm,
Antony Pavlov, Leif Lindholm, Joel Stanley
On 1/31/21 1:31 PM, Philippe Mathieu-Daudé wrote:
> On 1/31/21 11:59 AM, Philippe Mathieu-Daudé wrote:
>> The SBSA-ref board only use CPUs available in the 64-bit build,
>> it is pointless to have it available in the 32-bit build.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Cc: Radoslaw Biernacki <rad@semihalf.com>
>> Cc: Leif Lindholm <leif@nuviainc.com>
>> ---
>> hw/arm/meson.build | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/arm/meson.build b/hw/arm/meson.build
>> index be39117b9b6..059ff7382f2 100644
>> --- a/hw/arm/meson.build
>> +++ b/hw/arm/meson.build
>> @@ -22,7 +22,7 @@
>> arm_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
>> arm_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c'))
>> arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c'))
>> -arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c'))
>> +arm_ss.add(when: ['CONFIG_SBSA_REF', 'TARGET_AARCH64'], if_true: files('sbsa-ref.c'))
>
> Please disregard this patch, it shows that my other patch
> "meson: Introduce target-specific Kconfig" is incorrect:
> https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg07989.html
> Probably because per docs/devel/kconfig.rst "devices are usually
> ``default y`` if and only if they have at least one ``depends on``".
The problem is the XLNX_ZYNQMP_ARM was incorrectly selected,
enabling AARCH64, pulling in CONFIG_SBSA_REF on 32-bit.
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg08014.html
With this change there is no problem (and this patch is not necessary):
config XLNX_ZYNQMP_ARM
bool
- default y if TCG && ARM
+ default y if TCG && AARCH64
Regards,
Phil.
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
2021-01-31 10:59 ` [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Philippe Mathieu-Daudé
@ 2021-02-01 15:16 ` Alistair Francis
0 siblings, 0 replies; 16+ messages in thread
From: Alistair Francis @ 2021-02-01 15:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, QEMU Trivial,
Alistair Francis, Michael Tokarev, Laurent Vivier,
Niek Linnenbank, qemu-arm, Antony Pavlov, Joel Stanley
On Sun, Jan 31, 2021 at 3:00 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The STM32F405 SoC uses an OR gate on its ADC IRQs.
>
> Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC")
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> Cc: alistair@alistair23.me
> ---
> hw/arm/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 13cc42dcc84..a320a124855 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -336,6 +336,7 @@ config STM32F205_SOC
> config STM32F405_SOC
> bool
> select ARM_V7M
> + select OR_IRQ
> select STM32F4XX_SYSCFG
> select STM32F4XX_EXTI
>
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA
2021-01-31 10:59 ` [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA Philippe Mathieu-Daudé
@ 2021-02-01 15:17 ` Alistair Francis
0 siblings, 0 replies; 16+ messages in thread
From: Alistair Francis @ 2021-02-01 15:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, QEMU Trivial,
Alistair Francis, Michael Tokarev, Laurent Vivier,
Niek Linnenbank, qemu-arm, Antony Pavlov, Edgar E. Iglesias,
Joel Stanley
On Sun, Jan 31, 2021 at 3:08 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The Versal SoC instantiates the TYPE_XLNX_ZDMA object in
> versal_create_admas(). Introduce the XLNX_ZDMA configuration
> and select it to fix:
>
> $ qemu-system-aarch64 -M xlnx-versal-virt ...
> qemu-system-aarch64: missing object type 'xlnx.zdma'
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> Cc: Alistair Francis <alistair@alistair23.me>
> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
> ---
> hw/arm/Kconfig | 2 ++
> hw/dma/Kconfig | 3 +++
> hw/dma/meson.build | 2 +-
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 223016bb4e8..09298881f2f 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -354,6 +354,7 @@ config XLNX_ZYNQMP_ARM
> select XILINX_AXI
> select XILINX_SPIPS
> select XLNX_ZYNQMP
> + select XLNX_ZDMA
>
> config XLNX_VERSAL
> bool
> @@ -362,6 +363,7 @@ config XLNX_VERSAL
> select CADENCE
> select VIRTIO_MMIO
> select UNIMP
> + select XLNX_ZDMA
>
> config NPCM7XX
> bool
> diff --git a/hw/dma/Kconfig b/hw/dma/Kconfig
> index d67492d36c1..5d6be1a7a7a 100644
> --- a/hw/dma/Kconfig
> +++ b/hw/dma/Kconfig
> @@ -18,6 +18,9 @@ config ZYNQ_DEVCFG
> bool
> select REGISTER
>
> +config XLNX_ZDMA
> + bool
> +
> config STP2000
> bool
>
> diff --git a/hw/dma/meson.build b/hw/dma/meson.build
> index b991d7698c7..47b4a7cb47b 100644
> --- a/hw/dma/meson.build
> +++ b/hw/dma/meson.build
> @@ -9,7 +9,7 @@
> softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
> softmmu_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
> softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
> -softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zdma.c'))
> +softmmu_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
> softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
> softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
> softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 7/7] hw/arm: Display CPU type in machine description
2021-01-31 10:59 ` [PATCH v2 7/7] hw/arm: Display CPU type in machine description Philippe Mathieu-Daudé
@ 2021-02-01 15:17 ` Alistair Francis
0 siblings, 0 replies; 16+ messages in thread
From: Alistair Francis @ 2021-02-01 15:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, QEMU Trivial,
Alistair Francis, Michael Tokarev, Laurent Vivier,
Niek Linnenbank, qemu-arm, Antony Pavlov, Joel Stanley
On Sun, Jan 31, 2021 at 3:08 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Most of ARM machines display their CPU when QEMU list the available
> machines (-M help). Some machines do not. Fix to unify the help
> output.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/digic_boards.c | 2 +-
> hw/arm/microbit.c | 2 +-
> hw/arm/netduino2.c | 2 +-
> hw/arm/netduinoplus2.c | 2 +-
> hw/arm/orangepi.c | 2 +-
> hw/arm/stellaris.c | 4 ++--
> 6 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index be12873673b..6cdc1d83fca 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -142,7 +142,7 @@ static void canon_a1100_init(MachineState *machine)
>
> static void canon_a1100_machine_init(MachineClass *mc)
> {
> - mc->desc = "Canon PowerShot A1100 IS";
> + mc->desc = "Canon PowerShot A1100 IS (ARM946)";
> mc->init = &canon_a1100_init;
> mc->ignore_memory_transaction_failures = true;
> mc->default_ram_size = 64 * MiB;
> diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
> index 0947491cb97..e9494334ce7 100644
> --- a/hw/arm/microbit.c
> +++ b/hw/arm/microbit.c
> @@ -64,7 +64,7 @@ static void microbit_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
>
> - mc->desc = "BBC micro:bit";
> + mc->desc = "BBC micro:bit (Cortex-M0)";
> mc->init = microbit_init;
> mc->max_cpus = 1;
> }
> diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
> index 8f103341443..1733b71507c 100644
> --- a/hw/arm/netduino2.c
> +++ b/hw/arm/netduino2.c
> @@ -54,7 +54,7 @@ static void netduino2_init(MachineState *machine)
>
> static void netduino2_machine_init(MachineClass *mc)
> {
> - mc->desc = "Netduino 2 Machine";
> + mc->desc = "Netduino 2 Machine (Cortex-M3)";
> mc->init = netduino2_init;
> mc->ignore_memory_transaction_failures = true;
> }
> diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c
> index 68abd3ec69d..d3ad7a2b675 100644
> --- a/hw/arm/netduinoplus2.c
> +++ b/hw/arm/netduinoplus2.c
> @@ -55,7 +55,7 @@ static void netduinoplus2_init(MachineState *machine)
>
> static void netduinoplus2_machine_init(MachineClass *mc)
> {
> - mc->desc = "Netduino Plus 2 Machine";
> + mc->desc = "Netduino Plus 2 Machine (Cortex-M4)";
> mc->init = netduinoplus2_init;
> }
>
> diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> index d6306dfddae..40cdb5c6d2c 100644
> --- a/hw/arm/orangepi.c
> +++ b/hw/arm/orangepi.c
> @@ -113,7 +113,7 @@ static void orangepi_init(MachineState *machine)
>
> static void orangepi_machine_init(MachineClass *mc)
> {
> - mc->desc = "Orange Pi PC";
> + mc->desc = "Orange Pi PC (Cortex-A7)";
> mc->init = orangepi_init;
> mc->block_default_type = IF_SD;
> mc->units_per_default_bus = 1;
> diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
> index ad72c0959f1..27292ec4113 100644
> --- a/hw/arm/stellaris.c
> +++ b/hw/arm/stellaris.c
> @@ -1538,7 +1538,7 @@ static void lm3s811evb_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
>
> - mc->desc = "Stellaris LM3S811EVB";
> + mc->desc = "Stellaris LM3S811EVB (Cortex-M3)";
> mc->init = lm3s811evb_init;
> mc->ignore_memory_transaction_failures = true;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
> @@ -1554,7 +1554,7 @@ static void lm3s6965evb_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
>
> - mc->desc = "Stellaris LM3S6965EVB";
> + mc->desc = "Stellaris LM3S6965EVB (Cortex-M3)";
> mc->init = lm3s6965evb_init;
> mc->ignore_memory_transaction_failures = true;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build
2021-01-31 10:59 ` [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build Philippe Mathieu-Daudé
@ 2021-02-01 15:29 ` Alistair Francis
0 siblings, 0 replies; 16+ messages in thread
From: Alistair Francis @ 2021-02-01 15:29 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, QEMU Trivial,
Alistair Francis, Michael Tokarev, Laurent Vivier,
Niek Linnenbank, qemu-arm, Antony Pavlov, Joel Stanley
On Sun, Jan 31, 2021 at 3:09 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Similarly to commit 210f47840dd, remove 64-bit CPUs (which have
> never been available on 32-bit build, see commit d14d42f19bf),
> to fix:
>
> $ make check-qtest-arm
> ...
> Running test qtest-arm/device-introspect-test
> missing object type 'cortex-a53-arm-cpu'
> Broken pipe
> ../tests/qtest/libqtest.c:181: kill_qemu() detected QEMU death from signal 6 (Aborted) (core dumped)
> ERROR qtest-arm/device-introspect-test - too few tests run (expected 6, got 5)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/virt.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 399da734548..f0e9d7dd7d8 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -199,9 +199,11 @@ static const int a15irqmap[] = {
> static const char *valid_cpus[] = {
> ARM_CPU_TYPE_NAME("cortex-a7"),
> ARM_CPU_TYPE_NAME("cortex-a15"),
> +#ifdef TARGET_AARCH64
> ARM_CPU_TYPE_NAME("cortex-a53"),
> ARM_CPU_TYPE_NAME("cortex-a57"),
> ARM_CPU_TYPE_NAME("cortex-a72"),
> +#endif /* TARGET_AARCH64 */
> ARM_CPU_TYPE_NAME("host"),
> ARM_CPU_TYPE_NAME("max"),
> };
> --
> 2.26.2
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-02-01 15:29 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-01-31 10:59 [PATCH v2 0/7] hw/arm: Misc trivial fixes/cleanups Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 1/7] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ Philippe Mathieu-Daudé
2021-02-01 15:16 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 2/7] hw/arm/exynos4210: " Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 3/7] hw/arm/xlnx-versal: Versal SoC requires ZDMA Philippe Mathieu-Daudé
2021-02-01 15:17 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 4/7] hw/arm/virt: Do not include 64-bit CPUs in 32-bit build Philippe Mathieu-Daudé
2021-02-01 15:29 ` Alistair Francis
2021-01-31 10:59 ` [PATCH v2 5/7] hw/arm/sbsa-ref: Restrict SBSA-ref board to 64-bit build Philippe Mathieu-Daudé
2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 15:31 ` Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 6/7] hw/arm/xlnx-zcu102: Restrict ZynqMP ZCU102 " Philippe Mathieu-Daudé
2021-01-31 12:31 ` Philippe Mathieu-Daudé
2021-01-31 15:30 ` Philippe Mathieu-Daudé
2021-01-31 10:59 ` [PATCH v2 7/7] hw/arm: Display CPU type in machine description Philippe Mathieu-Daudé
2021-02-01 15:17 ` Alistair Francis
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