* [PATCH v3 1/2] rust: error: Add EOVERFLOW
2024-11-04 9:06 [PATCH v3 0/2] Add dma coherent allocator abstraction Abdiel Janulgue
@ 2024-11-04 9:06 ` Abdiel Janulgue
2024-11-04 9:06 ` [PATCH v3 2/2] rust: add dma coherent allocator abstraction Abdiel Janulgue
1 sibling, 0 replies; 7+ messages in thread
From: Abdiel Janulgue @ 2024-11-04 9:06 UTC (permalink / raw)
To: rust-for-linux
Cc: daniel.almeida, a.hindborg, linux-kernel, dakr, airlied,
miguel.ojeda.sandonis, wedsonaf, Abdiel Janulgue
Trivial addition for missing EOVERFLOW error. This is used by a
subsequent patch that might require returning EOVERFLOW as a result
of `checked_mul`.
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@gmail.com>
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index 7cd3bbab52f2..92bfdaaedb02 100644
--- a/rust/kernel/error.rs
+++ b/rust/kernel/error.rs
@@ -63,6 +63,7 @@ macro_rules! declare_err {
declare_err!(EPIPE, "Broken pipe.");
declare_err!(EDOM, "Math argument out of domain of func.");
declare_err!(ERANGE, "Math result not representable.");
+ declare_err!(EOVERFLOW, "Value too large for defined data type.");
declare_err!(ERESTARTSYS, "Restart the system call.");
declare_err!(ERESTARTNOINTR, "System call was interrupted by a signal and will be restarted.");
declare_err!(ERESTARTNOHAND, "Restart if no handler.");
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 2/2] rust: add dma coherent allocator abstraction.
2024-11-04 9:06 [PATCH v3 0/2] Add dma coherent allocator abstraction Abdiel Janulgue
2024-11-04 9:06 ` [PATCH v3 1/2] rust: error: Add EOVERFLOW Abdiel Janulgue
@ 2024-11-04 9:06 ` Abdiel Janulgue
2024-11-04 9:31 ` Alice Ryhl
1 sibling, 1 reply; 7+ messages in thread
From: Abdiel Janulgue @ 2024-11-04 9:06 UTC (permalink / raw)
To: rust-for-linux
Cc: daniel.almeida, a.hindborg, linux-kernel, dakr, airlied,
miguel.ojeda.sandonis, wedsonaf, Abdiel Janulgue,
Andreas Hindborg
Add a simple dma coherent allocator rust abstraction. Based on
Andreas Hindborg's dma abstractions from the rnvme driver.
Co-developed-by: Wedson Almeida Filho <wedsonaf@gmail.com>
Signed-off-by: Wedson Almeida Filho <wedsonaf@gmail.com>
Co-developed-by: Andreas Hindborg <a.hindborg@samsung.com>
Signed-off-by: Andreas Hindborg <a.hindborg@samsung.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@gmail.com>
---
rust/bindings/bindings_helper.h | 1 +
rust/kernel/dma.rs | 165 ++++++++++++++++++++++++++++++++
rust/kernel/lib.rs | 1 +
3 files changed, 167 insertions(+)
create mode 100644 rust/kernel/dma.rs
diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helper.h
index a80783fcbe04..3ff2abbfaef6 100644
--- a/rust/bindings/bindings_helper.h
+++ b/rust/bindings/bindings_helper.h
@@ -10,6 +10,7 @@
#include <linux/blk-mq.h>
#include <linux/blk_types.h>
#include <linux/blkdev.h>
+#include <linux/dma-mapping.h>
#include <linux/errname.h>
#include <linux/ethtool.h>
#include <linux/firmware.h>
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
new file mode 100644
index 000000000000..75a304d612f0
--- /dev/null
+++ b/rust/kernel/dma.rs
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0
+
+//! Direct memory access (DMA).
+//!
+//! C header: [`include/linux/dma-mapping.h`](srctree/include/linux/dma-mapping.h)
+
+use crate::{
+ bindings,
+ device::Device,
+ error::code::*,
+ error::Result,
+ types::ARef,
+};
+use core::ops::Add;
+
+/// Abstraction of dma_alloc_coherent
+///
+/// # Invariants
+///
+/// For the lifetime of an instance of CoherentAllocation, the cpu address is a valid pointer
+/// to an allocated region of consistent memory and we hold a reference to the device.
+pub struct CoherentAllocation<T: Add> {
+ dev: ARef<Device>,
+ dma_handle: bindings::dma_addr_t,
+ count: usize,
+ cpu_addr: *mut T,
+}
+
+impl<T: Add> CoherentAllocation<T> {
+ /// Allocates a region of `size_of::<T> * count` of consistent memory.
+ ///
+ /// Returns a CoherentAllocation object which contains a pointer to the allocated region
+ /// (in the processor's virtual address space) and the device address which can be
+ /// given to the device as the DMA address base of the region. The region is released once
+ /// [`CoherentAllocation`] is dropped.
+ ///
+ /// # Examples
+ ///
+ /// ```
+ /// use kernel::device::Device;
+ /// use kernel::dma::CoherentAllocation;
+ ///
+ /// # fn dox(dev: &Device) -> Result<()> {
+ /// let c: CoherentAllocation<u64> = CoherentAllocation::alloc_coherent(dev, 4, GFP_KERNEL)?;
+ /// # Ok(()) }
+ /// ```
+ pub fn alloc_coherent(
+ dev: &Device,
+ count: usize,
+ flags: kernel::alloc::Flags,
+ ) -> Result<CoherentAllocation<T>> {
+ let t_size = core::mem::size_of::<T>();
+ let size = count.checked_mul(t_size).ok_or(EOVERFLOW)?;
+ let mut dma_handle = 0;
+ // SAFETY: device pointer is guaranteed as valid by invariant on `Device`.
+ // We ensure that we catch the failure on this function and throw an ENOMEM
+ let ret = unsafe {
+ bindings::dma_alloc_attrs(
+ dev.as_raw(),
+ size,
+ &mut dma_handle, flags.as_raw(),
+ 0,
+ )
+ };
+ if ret.is_null() {
+ return Err(ENOMEM)
+ }
+
+ Ok(Self {
+ dev: dev.into(),
+ dma_handle,
+ count,
+ cpu_addr: ret as _,
+ })
+ }
+
+ /// Reads a value on a location specified by index.
+ pub fn read(&self, index: usize) -> Result<T>
+ where
+ T: Copy
+ {
+ if let Some(val) = self.cpu_buf().get(index) {
+ Ok(*val)
+ } else {
+ Err(EINVAL)
+ }
+ }
+
+ /// Write a value on the memory location specified by index.
+ pub fn write(&mut self, index: usize, value: &T) -> Result
+ where
+ T: Copy,
+ {
+ if let Some(elem) = self.cpu_buf_mut().get_mut(index) {
+ *elem = *value;
+ Ok(())
+ } else {
+ Err(EINVAL)
+ }
+ }
+
+ /// Performs a read and then a write of a value on a location specified by index.
+ pub fn read_write(&mut self, index: usize, value: &T) -> Result<T>
+ where
+ T: Copy,
+ {
+ if let Some(elem) = self.cpu_buf_mut().get_mut(index) {
+ let val = *elem;
+ *elem = *value;
+ Ok(val)
+ } else {
+ Err(EINVAL)
+ }
+ }
+
+ /// Returns the base address to the allocated region and the dma handle.
+ /// Caller takes ownership of returned resources.
+ pub fn into_parts(self) -> (usize, bindings::dma_addr_t) {
+ let ret = (self.cpu_addr as _, self.dma_handle);
+ core::mem::forget(self);
+ ret
+ }
+
+ /// Returns the base address to the allocated region in the CPU's virtual address space.
+ pub fn start_ptr(&self) -> *const T {
+ self.cpu_addr as _
+ }
+
+ /// Returns the base address to the allocated region in the CPU's virtual address space as
+ /// a mutable pointer.
+ pub fn start_ptr_mut(&mut self) -> *mut T {
+ self.cpu_addr
+ }
+
+ /// Returns a DMA handle which may given to the device as the DMA address base of
+ /// the region.
+ pub fn dma_handle(&self) -> bindings::dma_addr_t {
+ self.dma_handle
+ }
+
+ fn cpu_buf(&self) -> &[T]
+ {
+ // SAFETY: The pointer is valid due to type invariant on `CoherentAllocation` and
+ // is valid for reads for `self.count * size_of::<T>` bytes.
+ unsafe { core::slice::from_raw_parts(self.cpu_addr, self.count) }
+ }
+
+ fn cpu_buf_mut(&mut self) -> &mut [T]
+ {
+ // SAFETY: The pointer is valid due to type invariant on `CoherentAllocation` and
+ // is valid for reads for `self.count * size_of::<T>` bytes.
+ unsafe { core::slice::from_raw_parts_mut(self.cpu_addr, self.count) }
+ }
+}
+
+impl<T: Add> Drop for CoherentAllocation<T> {
+ fn drop(&mut self) {
+ let size = self.count * core::mem::size_of::<T>();
+ // SAFETY: the device, cpu address, and the dma handle is valid due to the
+ // type invariants on `CoherentAllocation`.
+ unsafe { bindings::dma_free_attrs(self.dev.as_raw(), size,
+ self.cpu_addr as _,
+ self.dma_handle, 0) }
+ }
+}
diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs
index b62451f64f6e..b713c92eb1ef 100644
--- a/rust/kernel/lib.rs
+++ b/rust/kernel/lib.rs
@@ -32,6 +32,7 @@
pub mod block;
mod build_assert;
pub mod device;
+pub mod dma;
pub mod error;
#[cfg(CONFIG_RUST_FW_LOADER_ABSTRACTIONS)]
pub mod firmware;
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread