[RFC PATCH v3 0/7] gpu: nova-core: register definitions and basic timer and falcon devices

[Alexandre Courbot <acourbot@nvidia.com>]

Hi everyone,

New RFC for the first steps towards bringing booting the GSP, with more
complete Falcon code. This code has been successfully used to run the
FECS-FRTS firmware from the bios and create the WPR2 region, although
this series alone is not enough to reproduce this - the next revision
will probably include the code required to extract that firmware from
the BIOS.

As for the previous revisions, the goal is to get more eyes to look at
the general direction of the driver and raise concerns if there are any,
the main point of discussion being probably the register!() macro that
is used to define register layouts.

The falcon code is still quite in a work-in-progress state, I am notably
still thinking of the best way to implement the HAL for chip-dependent
operations (right now we branch depending on the chipset, but that
obviously won't scale). So the overall design is still very much
flexible.

Dependencies:

- https://lore.kernel.org/rust-for-linux/20250318-topic-panthor-rs-genmask-v4-1-35004fca6ac5@collabora.com/
- https://lore.kernel.org/rust-for-linux/20250319-try_with-v2-0-822ec63c05fb@nvidia.com/
- https://lore.kernel.org/rust-for-linux/20250224115007.2072043-1-abdiel.janulgue@gmail.com/
- https://lore.kernel.org/rust-for-linux/20250306222336.23482-1-dakr@kernel.org/
- https://lore.kernel.org/rust-for-linux/20250320-registers-v2-1-d277409bcde8@nvidia.com/

TODO:

- Document more registers and fields,
- Add BIOS extractor code to obtain the FWSEC-FRTS firmware,
- Complete FWSEC-FRTS execution to obtain WPR2 region.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
Changes in v3:
- Fixed typo in Boot0 register definition that made probing fail.
- Moved the register definition macros to their own patch series.
- Used Revocable::try_access_with() when accessing registers.
- Added all the Falcon code required to boot FWSEC-FRTS.
- Link to v2: https://lore.kernel.org/r/20250304-nova_timer-v2-0-8fb13f3f8cff@nvidia.com

Changes in v2:
- Don't hold the Bar guard in methods that can sleep.
- Added a Timestamp type for Timer to safely and easily get durations
  between two measurements.
- Added a macro to make register definitions easier.
- Added a very basic falcon implementation to define more registers and
  exercise the register definition macro.
- Link to v1: https://lore.kernel.org/r/20250217-nova_timer-v1-0-78c5ace2d987@nvidia.com

---
Alexandre Courbot (7):
      rust: add useful ops for u64
      rust: make ETIMEDOUT error available
      gpu: nova-core: derive useful traits for Chipset
      gpu: nova-core: add missing GA100 definition
      gpu: nova-core: use register!() to define register layout
      gpu: nova-core: add basic timer device
      gpu: nova-core: add falcon register definitions and probe code

 drivers/gpu/nova-core/driver.rs    |   4 +-
 drivers/gpu/nova-core/falcon.rs    | 618 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/nova-core/gpu.rs       |  78 ++++-
 drivers/gpu/nova-core/nova_core.rs |  14 +
 drivers/gpu/nova-core/regs.rs      | 261 ++++++++++++----
 drivers/gpu/nova-core/timer.rs     | 132 ++++++++
 rust/kernel/error.rs               |   1 +
 rust/kernel/lib.rs                 |   1 +
 rust/kernel/num.rs                 |  52 ++++
 9 files changed, 1101 insertions(+), 60 deletions(-)
---
base-commit: 1d53763dc16c9fc9329a4cdc14d691979d47568f
change-id: 20250216-nova_timer-c69430184f54
prerequisite-change-id: 20241023-topic-panthor-rs-genmask-fabc573fef43:v4
prerequisite-patch-id: 182945904fd914573eed9388a559ce8a642310ef
prerequisite-message-id: <20250224115007.2072043-1-abdiel.janulgue@gmail.com>
prerequisite-patch-id: 73f4047ae5d3e4d51cfa285bd8fd0f1c04d47409
prerequisite-patch-id: 5ad45352d9d457a45886eeea90a46cc21516356e
prerequisite-patch-id: 725e7d42309919c759fdd0585a97810b1eb72706
prerequisite-message-id: <20250306222336.23482-1-dakr@kernel.org>
prerequisite-patch-id: de15c0d16727e6af2d79f88f5b67be4c06212552
prerequisite-patch-id: f8bca95d983222da29508cc6e6886e4b0f992588
prerequisite-patch-id: 1ae8f68250fb43808342285a284bcf7b572263fe
prerequisite-patch-id: fa5ce1308e1dbc71374a381537ab3978babe20a0
prerequisite-patch-id: 7225e000f745bb5fd45fc43393d801d1d9adb767

Best regards,
-- 
Alexandre Courbot <acourbot@nvidia.com>