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From: Alexandre Courbot <acourbot@nvidia.com>
To: "Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Benno Lossin" <lossin@kernel.org>
Cc: John Hubbard <jhubbard@nvidia.com>,
	Ben Skeggs <bskeggs@nvidia.com>,
	 Joel Fernandes <joelagnelf@nvidia.com>,
	Timur Tabi <ttabi@nvidia.com>,
	 Alistair Popple <apopple@nvidia.com>,
	linux-kernel@vger.kernel.org,  rust-for-linux@vger.kernel.org,
	nouveau@lists.freedesktop.org,  dri-devel@lists.freedesktop.org,
	Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH v6 02/24] rust: dma: expose the count and size of CoherentAllocation
Date: Thu, 19 Jun 2025 22:23:46 +0900	[thread overview]
Message-ID: <20250619-nova-frts-v6-2-ecf41ef99252@nvidia.com> (raw)
In-Reply-To: <20250619-nova-frts-v6-0-ecf41ef99252@nvidia.com>

These properties are very useful to have (and to be used by nova-core)
and should be accessible.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 rust/kernel/dma.rs | 32 ++++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index 5fb54714a1600d97b30b24f344081f5558d43452..15ff639b3067d0e4a39e181bbe709a9c372a591a 100644
--- a/rust/kernel/dma.rs
+++ b/rust/kernel/dma.rs
@@ -114,9 +114,11 @@ pub mod attrs {
 ///
 /// # Invariants
 ///
-/// For the lifetime of an instance of [`CoherentAllocation`], the `cpu_addr` is a valid pointer
-/// to an allocated region of consistent memory and `dma_handle` is the DMA address base of
-/// the region.
+/// - For the lifetime of an instance of [`CoherentAllocation`], the `cpu_addr` is a valid pointer
+///   to an allocated region of consistent memory and `dma_handle` is the DMA address base of the
+///   region.
+/// - The size in bytes of the allocation is equal to `size_of::<T> * count`.
+/// - `size_of::<T> * count` fits into a `usize`.
 // TODO
 //
 // DMA allocations potentially carry device resources (e.g.IOMMU mappings), hence for soundness
@@ -179,9 +181,12 @@ pub fn alloc_attrs(
         if ret.is_null() {
             return Err(ENOMEM);
         }
-        // INVARIANT: We just successfully allocated a coherent region which is accessible for
-        // `count` elements, hence the cpu address is valid. We also hold a refcounted reference
-        // to the device.
+        // INVARIANT:
+        // - We just successfully allocated a coherent region which is accessible for
+        //   `count` elements, hence the cpu address is valid. We also hold a refcounted reference
+        //   to the device.
+        // - The allocated `size` is equal to `size_of::<T> * count`.
+        // - The allocated `size` fits into a `usize`.
         Ok(Self {
             dev: dev.into(),
             dma_handle,
@@ -201,6 +206,21 @@ pub fn alloc_coherent(
         CoherentAllocation::alloc_attrs(dev, count, gfp_flags, Attrs(0))
     }
 
+    /// Returns the number of elements `T` in this allocation.
+    ///
+    /// Note that this is not the size of the allocation in bytes, which is provided by
+    /// [`Self::size`].
+    pub fn count(&self) -> usize {
+        self.count
+    }
+
+    /// Returns the size in bytes of this allocation.
+    pub fn size(&self) -> usize {
+        // INVARIANT: The type invariant of `Self` guarantees that `size_of::<T> * count` fits into
+        // a `usize`.
+        self.count * core::mem::size_of::<T>()
+    }
+
     /// Returns the base address to the allocated region in the CPU's virtual address space.
     pub fn start_ptr(&self) -> *const T {
         self.cpu_addr

-- 
2.49.0


  parent reply	other threads:[~2025-06-19 13:24 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-19 13:23 [PATCH v6 00/24] nova-core: run FWSEC-FRTS to perform first stage of GSP initialization Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 01/24] rust: dma: fix comment Alexandre Courbot
2025-06-23 15:49   ` Danilo Krummrich
2025-06-19 13:23 ` Alexandre Courbot [this message]
2025-06-23 15:49   ` [PATCH v6 02/24] rust: dma: expose the count and size of CoherentAllocation Danilo Krummrich
2025-06-19 13:23 ` [PATCH v6 03/24] rust: dma: add dma_handle_with_offset method to CoherentAllocation Alexandre Courbot
2025-06-23 15:50   ` Danilo Krummrich
2025-06-19 13:23 ` [PATCH v6 04/24] rust: make ETIMEDOUT error available Alexandre Courbot
2025-06-23 16:07   ` Miguel Ojeda
2025-06-19 13:23 ` [PATCH v6 05/24] rust: sizes: add constants up to SZ_2G Alexandre Courbot
2025-06-23 16:06   ` Miguel Ojeda
2025-06-19 13:23 ` [PATCH v6 06/24] gpu: nova-core: use absolute paths in register!() macro Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 07/24] gpu: nova-core: add delimiter for helper rules " Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 08/24] gpu: nova-core: expose the offset of each register as a type constant Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 09/24] gpu: nova-core: allow register aliases Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 10/24] gpu: nova-core: increase BAR0 size to 16MB Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 11/24] gpu: nova-core: add helper function to wait on condition Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 12/24] gpu: nova-core: wait for GFW_BOOT completion Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 13/24] gpu: nova-core: add DMA object struct Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 14/24] gpu: nova-core: register sysmem flush page Alexandre Courbot
2025-06-19 13:23 ` [PATCH v6 15/24] gpu: nova-core: add falcon register definitions and base code Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 16/24] gpu: nova-core: firmware: add ucode descriptor used by FWSEC-FRTS Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 17/24] gpu: nova-core: vbios: Add base support for VBIOS construction and iteration Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 18/24] gpu: nova-core: vbios: Add support to look up PMU table in FWSEC Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 19/24] gpu: nova-core: vbios: Add support for FWSEC ucode extraction Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 20/24] gpu: nova-core: compute layout of the FRTS region Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 21/24] gpu: nova-core: add types for patching firmware binaries Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 22/24] gpu: nova-core: extract FWSEC from BIOS and patch it to run FWSEC-FRTS Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 23/24] gpu: nova-core: load and " Alexandre Courbot
2025-06-19 13:24 ` [PATCH v6 24/24] gpu: nova-core: update and annotate TODO list Alexandre Courbot
2025-06-23 21:01 ` [PATCH v6 00/24] nova-core: run FWSEC-FRTS to perform first stage of GSP initialization Danilo Krummrich
2025-06-24  2:56   ` Alexandre Courbot
2025-06-24  5:17     ` John Hubbard
2025-06-30 15:43     ` Danilo Krummrich
2025-07-01  6:29       ` Alexandre Courbot

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