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This ensures that a given conversion cannot lose data if its source or destination type ever changes. Acked-by: Danilo Krummrich Signed-off-by: Alexandre Courbot --- drivers/gpu/nova-core/falcon.rs | 5 +++-- drivers/gpu/nova-core/fb.rs | 7 ++++--- drivers/gpu/nova-core/firmware.rs | 7 ++++--- drivers/gpu/nova-core/firmware/booter.rs | 31 +++++++++++++++++-------------- drivers/gpu/nova-core/firmware/fwsec.rs | 11 ++++++----- drivers/gpu/nova-core/firmware/gsp.rs | 5 +++-- drivers/gpu/nova-core/firmware/riscv.rs | 7 ++++--- drivers/gpu/nova-core/regs.rs | 5 +++-- drivers/gpu/nova-core/vbios.rs | 9 +++++---- 9 files changed, 49 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index fb3561cc9746..a44df1ac8873 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -15,6 +15,7 @@ use crate::dma::DmaObject; use crate::driver::Bar0; use crate::gpu::Chipset; +use crate::num::{FromAs, IntoAs}; use crate::regs; use crate::regs::macros::RegisterBase; @@ -442,7 +443,7 @@ fn dma_wr>( FalconMem::Imem => (load_offsets.src_start, fw.dma_handle()), FalconMem::Dmem => ( 0, - fw.dma_handle_with_offset(load_offsets.src_start as usize)?, + fw.dma_handle_with_offset(load_offsets.src_start.into_as())?, ), }; if dma_start % DmaAddress::from(DMA_LEN) > 0 { @@ -468,7 +469,7 @@ fn dma_wr>( dev_err!(self.dev, "DMA transfer length overflow"); return Err(EOVERFLOW); } - Some(upper_bound) if upper_bound as usize > fw.size() => { + Some(upper_bound) if usize::from_as(upper_bound) > fw.size() => { dev_err!(self.dev, "DMA transfer goes beyond range of DMA object"); return Err(EINVAL); } diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 27d9edab8347..1461dd643cae 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -11,6 +11,7 @@ use crate::dma::DmaObject; use crate::driver::Bar0; use crate::gpu::Chipset; +use crate::num::usize_as_u64; use crate::regs; mod hal; @@ -105,14 +106,14 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result { let vga_workspace = { let vga_base = { - const NV_PRAMIN_SIZE: u64 = SZ_1M as u64; + const NV_PRAMIN_SIZE: u64 = usize_as_u64(SZ_1M); let base = fb.end - NV_PRAMIN_SIZE; if hal.supports_display(bar) { match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).vga_workspace_addr() { Some(addr) => { if addr < base { - const VBIOS_WORKSPACE_SIZE: u64 = SZ_128K as u64; + const VBIOS_WORKSPACE_SIZE: u64 = usize_as_u64(SZ_128K); // Point workspace address to end of framebuffer. fb.end - VBIOS_WORKSPACE_SIZE @@ -132,7 +133,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result { let frts = { const FRTS_DOWN_ALIGN: Alignment = Alignment::new::(); - const FRTS_SIZE: u64 = SZ_1M as u64; + const FRTS_SIZE: u64 = usize_as_u64(SZ_1M); let frts_base = vga_workspace.start.align_down(FRTS_DOWN_ALIGN) - FRTS_SIZE; frts_base..frts_base + FRTS_SIZE diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firmware.rs index 4179a74a2342..ae6dbefd9e5a 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -15,6 +15,7 @@ use crate::dma::DmaObject; use crate::falcon::FalconFirmware; use crate::gpu; +use crate::num::{FromAs, IntoAs}; pub(crate) mod booter; pub(crate) mod fwsec; @@ -75,7 +76,7 @@ pub(crate) fn size(&self) -> usize { const HDR_SIZE_SHIFT: u32 = 16; const HDR_SIZE_MASK: u32 = 0xffff0000; - ((self.hdr & HDR_SIZE_MASK) >> HDR_SIZE_SHIFT) as usize + ((self.hdr & HDR_SIZE_MASK) >> HDR_SIZE_SHIFT).into_as() } } @@ -190,8 +191,8 @@ fn new(fw: &'a firmware::Firmware) -> Result { /// Returns the data payload of the firmware, or `None` if the data range is out of bounds of /// the firmware image. fn data(&self) -> Option<&[u8]> { - let fw_start = self.hdr.data_offset as usize; - let fw_size = self.hdr.data_size as usize; + let fw_start = usize::from_as(self.hdr.data_offset); + let fw_size = usize::from_as(self.hdr.data_size); self.fw.get(fw_start..fw_start + fw_size) } diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs index b4ff1b17e4a0..bab66ed85f10 100644 --- a/drivers/gpu/nova-core/firmware/booter.rs +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -18,6 +18,7 @@ use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget}; use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned}; use crate::gpu::Chipset; +use crate::num::{FromAs, IntoAs}; /// Local convenience function to return a copy of `S` by reinterpreting the bytes starting at /// `offset` in `slice`. @@ -74,7 +75,7 @@ impl<'a> HsFirmwareV2<'a> { /// /// Fails if the header pointed at by `bin_fw` is not within the bounds of the firmware image. fn new(bin_fw: &BinFirmware<'a>) -> Result { - frombytes_at::(bin_fw.fw, bin_fw.hdr.header_offset as usize) + frombytes_at::(bin_fw.fw, bin_fw.hdr.header_offset.into_as()) .map(|hdr| Self { hdr, fw: bin_fw.fw }) } @@ -83,7 +84,7 @@ fn new(bin_fw: &BinFirmware<'a>) -> Result { /// Fails if the offset of the patch location is outside the bounds of the firmware /// image. fn patch_location(&self) -> Result { - frombytes_at::(self.fw, self.hdr.patch_loc_offset as usize) + frombytes_at::(self.fw, self.hdr.patch_loc_offset.into_as()) } /// Returns an iterator to the signatures of the firmware. The iterator can be empty if the @@ -91,19 +92,21 @@ fn patch_location(&self) -> Result { /// /// Fails if the pointed signatures are outside the bounds of the firmware image. fn signatures_iter(&'a self) -> Result>> { - let num_sig = frombytes_at::(self.fw, self.hdr.num_sig_offset as usize)?; + let num_sig = frombytes_at::(self.fw, self.hdr.num_sig_offset.into_as())?; let iter = match self.hdr.sig_prod_size.checked_div(num_sig) { // If there are no signatures, return an iterator that will yield zero elements. None => (&[] as &[u8]).chunks_exact(1), Some(sig_size) => { - let patch_sig = frombytes_at::(self.fw, self.hdr.patch_sig_offset as usize)?; - let signatures_start = (self.hdr.sig_prod_offset + patch_sig) as usize; + let patch_sig = frombytes_at::(self.fw, self.hdr.patch_sig_offset.into_as())?; + let signatures_start = usize::from_as(self.hdr.sig_prod_offset + patch_sig); self.fw // Get signatures range. - .get(signatures_start..signatures_start + self.hdr.sig_prod_size as usize) + .get( + signatures_start..signatures_start + usize::from_as(self.hdr.sig_prod_size), + ) .ok_or(EINVAL)? - .chunks_exact(sig_size as usize) + .chunks_exact(sig_size.into_as()) } }; @@ -132,9 +135,9 @@ impl HsSignatureParams { /// Fails if the meta data parameter of `hs_fw` is outside the bounds of the firmware image, or /// if its size doesn't match that of [`HsSignatureParams`]. fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { - let start = hs_fw.hdr.meta_data_offset as usize; + let start = usize::from_as(hs_fw.hdr.meta_data_offset); let end = start - .checked_add(hs_fw.hdr.meta_data_size as usize) + .checked_add(hs_fw.hdr.meta_data_size.into_as()) .ok_or(EINVAL)?; hs_fw @@ -169,7 +172,7 @@ impl HsLoadHeaderV2 { /// /// Fails if the header pointed at by `hs_fw` is not within the bounds of the firmware image. fn new(hs_fw: &HsFirmwareV2<'_>) -> Result { - frombytes_at::(hs_fw.fw, hs_fw.hdr.header_offset as usize) + frombytes_at::(hs_fw.fw, hs_fw.hdr.header_offset.into_as()) } } @@ -198,12 +201,12 @@ fn new(hs_fw: &HsFirmwareV2<'_>, idx: u32) -> Result { } else { frombytes_at::( hs_fw.fw, - (hs_fw.hdr.header_offset as usize) + usize::from_as(hs_fw.hdr.header_offset) // Skip the load header... .checked_add(size_of::()) // ... and jump to app header `idx`. .and_then(|offset| { - offset.checked_add((idx as usize).checked_mul(size_of::())?) + offset.checked_add(usize::from_as(idx).checked_mul(size_of::())?) }) .ok_or(EINVAL)?, ) @@ -318,12 +321,12 @@ pub(crate) fn new( dev_err!(dev, "invalid fuse version for Booter firmware\n"); return Err(EINVAL); }; - signatures.nth(idx as usize) + signatures.nth(idx.into_as()) } } .ok_or(EINVAL)?; - ucode.patch_signature(&signature, patch_loc as usize)? + ucode.patch_signature(&signature, patch_loc.into_as())? } }; diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs index ce78c1563754..ed82e74ccdc9 100644 --- a/drivers/gpu/nova-core/firmware/fwsec.rs +++ b/drivers/gpu/nova-core/firmware/fwsec.rs @@ -23,6 +23,7 @@ use crate::falcon::gsp::Gsp; use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget}; use crate::firmware::{FalconUCodeDescV3, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned}; +use crate::num::{FromAs, IntoAs}; use crate::vbios::Vbios; const NVFW_FALCON_APPIF_ID_DMEMMAPPER: u32 = 0x4; @@ -250,7 +251,7 @@ fn new_fwsec(dev: &Device, bios: &Vbios, cmd: FwsecCommand) -> Re let ucode = bios.fwsec_image().ucode(desc)?; let mut dma_object = DmaObject::from_data(dev, ucode)?; - let hdr_offset = (desc.imem_load_size + desc.interface_offset) as usize; + let hdr_offset = usize::from_as(desc.imem_load_size + desc.interface_offset); // SAFETY: we have exclusive access to `dma_object`. let hdr: &FalconAppifHdrV1 = unsafe { transmute(&dma_object, hdr_offset) }?; @@ -277,7 +278,7 @@ fn new_fwsec(dev: &Device, bios: &Vbios, cmd: FwsecCommand) -> Re let dmem_mapper: &mut FalconAppifDmemmapperV3 = unsafe { transmute_mut( &mut dma_object, - (desc.imem_load_size + app.dmem_base) as usize, + (desc.imem_load_size + app.dmem_base).into_as(), ) }?; @@ -285,7 +286,7 @@ fn new_fwsec(dev: &Device, bios: &Vbios, cmd: FwsecCommand) -> Re let frts_cmd: &mut FrtsCmd = unsafe { transmute_mut( &mut dma_object, - (desc.imem_load_size + dmem_mapper.cmd_in_buffer_offset) as usize, + (desc.imem_load_size + dmem_mapper.cmd_in_buffer_offset).into_as(), ) }?; @@ -338,7 +339,7 @@ pub(crate) fn new( // Patch signature if needed. let desc = bios.fwsec_image().header()?; let ucode_signed = if desc.signature_count != 0 { - let sig_base_img = (desc.imem_load_size + desc.pkc_data_offset) as usize; + let sig_base_img = usize::from_as(desc.imem_load_size + desc.pkc_data_offset); let desc_sig_versions = u32::from(desc.signature_versions); let reg_fuse_version = falcon.signature_reg_fuse_version(bar, desc.engine_id_mask, desc.ucode_id)?; @@ -369,7 +370,7 @@ pub(crate) fn new( // Mask of the bits of `desc_sig_versions` to preserve. let reg_fuse_version_mask = reg_fuse_version_bit.wrapping_sub(1); - (desc_sig_versions & reg_fuse_version_mask).count_ones() as usize + usize::from_as((desc_sig_versions & reg_fuse_version_mask).count_ones()) }; dev_dbg!(dev, "patching signature with index {}\n", signature_idx); diff --git a/drivers/gpu/nova-core/firmware/gsp.rs b/drivers/gpu/nova-core/firmware/gsp.rs index 24c3ea698940..637adf989ee8 100644 --- a/drivers/gpu/nova-core/firmware/gsp.rs +++ b/drivers/gpu/nova-core/firmware/gsp.rs @@ -12,6 +12,7 @@ use crate::firmware::riscv::RiscvFirmware; use crate::gpu::{Architecture, Chipset}; use crate::gsp::GSP_PAGE_SIZE; +use crate::num::FromAs; /// Ad-hoc and temporary module to extract sections from ELF images. /// @@ -232,10 +233,10 @@ pub(crate) fn radix3_dma_handle(&self) -> DmaAddress { fn map_into_lvl(sg_table: &SGTable>>, mut dst: VVec) -> Result> { for sg_entry in sg_table.iter() { // Number of pages we need to map. - let num_pages = (sg_entry.dma_len() as usize).div_ceil(GSP_PAGE_SIZE); + let num_pages = usize::from_as(sg_entry.dma_len()).div_ceil(GSP_PAGE_SIZE); for i in 0..num_pages { - let entry = sg_entry.dma_address() + (i as u64 * GSP_PAGE_SIZE as u64); + let entry = sg_entry.dma_address() + (u64::from_as(i) * u64::from_as(GSP_PAGE_SIZE)); dst.extend_from_slice(&entry.to_le_bytes(), GFP_KERNEL)?; } } diff --git a/drivers/gpu/nova-core/firmware/riscv.rs b/drivers/gpu/nova-core/firmware/riscv.rs index afb08f5bc4ba..fabb38fa8c55 100644 --- a/drivers/gpu/nova-core/firmware/riscv.rs +++ b/drivers/gpu/nova-core/firmware/riscv.rs @@ -12,6 +12,7 @@ use crate::dma::DmaObject; use crate::firmware::BinFirmware; +use crate::num::FromAs; /// Descriptor for microcode running on a RISC-V core. #[repr(C)] @@ -41,7 +42,7 @@ impl RmRiscvUCodeDesc { /// /// Fails if the header pointed at by `bin_fw` is not within the bounds of the firmware image. fn new(bin_fw: &BinFirmware<'_>) -> Result { - let offset = bin_fw.hdr.header_offset as usize; + let offset = usize::from_as(bin_fw.hdr.header_offset); bin_fw .fw @@ -74,8 +75,8 @@ pub(crate) fn new(dev: &device::Device, fw: &Firmware) -> Result< let riscv_desc = RmRiscvUCodeDesc::new(&bin_fw)?; let ucode = { - let start = bin_fw.hdr.data_offset as usize; - let len = bin_fw.hdr.data_size as usize; + let start = usize::from_as(bin_fw.hdr.data_offset); + let len = usize::from_as(bin_fw.hdr.data_size); DmaObject::from_data(dev, fw.data().get(start..start + len).ok_or(EINVAL)?)? }; diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 206dab2e1335..b3ed164aa2ac 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -12,6 +12,7 @@ FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, PFalconBase, PeregrineCoreSelect, }; use crate::gpu::{Architecture, Chipset}; +use crate::num::FromAs; use kernel::prelude::*; // PMC @@ -75,7 +76,7 @@ impl NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { let size = (u64::from(self.lower_mag()) << u64::from(self.lower_scale())) - * kernel::sizes::SZ_1M as u64; + * u64::from_as(kernel::sizes::SZ_1M); if self.ecc_mode_enabled() { // Remove the amount of memory reserved for ECC (one per 16 units). @@ -158,7 +159,7 @@ pub(crate) fn completed(self) -> bool { impl NV_USABLE_FB_SIZE_IN_MB { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { - u64::from(self.value()) * kernel::sizes::SZ_1M as u64 + u64::from(self.value()) * u64::from_as(kernel::sizes::SZ_1M) } } diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs index a521c0a4df0f..234a9f29787b 100644 --- a/drivers/gpu/nova-core/vbios.rs +++ b/drivers/gpu/nova-core/vbios.rs @@ -5,6 +5,7 @@ use crate::driver::Bar0; use crate::firmware::fwsec::Bcrt30Rsa3kSignature; use crate::firmware::FalconUCodeDescV3; +use crate::num::FromAs; use core::convert::TryFrom; use kernel::device; use kernel::error::Result; @@ -825,7 +826,7 @@ fn falcon_data_ptr(&self) -> Result { let data_ptr = u32::from_le_bytes(bytes); - if (usize::from_u32(data_ptr)) < self.base.data.len() { + if (usize::from_as(data_ptr)) < self.base.data.len() { dev_err!(self.base.dev, "Falcon data pointer out of bounds\n"); return Err(EINVAL); } @@ -953,7 +954,7 @@ fn setup_falcon_data( pci_at_image: &PciAtBiosImage, first_fwsec: &FwSecBiosBuilder, ) -> Result { - let mut offset = pci_at_image.falcon_data_ptr()? as usize; + let mut offset = usize::from_as(pci_at_image.falcon_data_ptr()?); let mut pmu_in_first_fwsec = false; // The falcon data pointer assumes that the PciAt and FWSEC images @@ -994,7 +995,7 @@ fn setup_falcon_data( .find_entry_by_type(FALCON_UCODE_ENTRY_APPID_FWSEC_PROD) { Ok(entry) => { - let mut ucode_offset = entry.data as usize; + let mut ucode_offset = usize::from_as(entry.data); ucode_offset -= pci_at_image.base.data.len(); if ucode_offset < first_fwsec.base.data.len() { dev_err!(self.base.dev, "Falcon Ucode offset not in second Fwsec.\n"); @@ -1080,7 +1081,7 @@ pub(crate) fn ucode(&self, desc: &FalconUCodeDescV3) -> Result<&[u8]> { // The ucode data follows the descriptor. let ucode_data_offset = falcon_ucode_offset + desc.size(); - let size = (desc.imem_load_size + desc.dmem_load_size) as usize; + let size = usize::from_as(desc.imem_load_size + desc.dmem_load_size); // Get the data slice, checking bounds in a single operation. self.base -- 2.51.0