From: Alexandre Courbot <acourbot@nvidia.com>
To: "Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Benno Lossin" <lossin@kernel.org>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>
Cc: John Hubbard <jhubbard@nvidia.com>,
Alistair Popple <apopple@nvidia.com>,
Joel Fernandes <joelagnelf@nvidia.com>,
Timur Tabi <ttabi@nvidia.com>, Edwin Peer <epeer@nvidia.com>,
nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org,
Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH v7 07/14] gpu: nova-core: Add zeroable trait to bindings
Date: Wed, 29 Oct 2025 17:16:34 +0900 [thread overview]
Message-ID: <20251029-gsp_boot-v7-7-34227afad347@nvidia.com> (raw)
In-Reply-To: <20251029-gsp_boot-v7-0-34227afad347@nvidia.com>
From: Alistair Popple <apopple@nvidia.com>
Derive the Zeroable trait for existing bindgen generated bindings. This
is safe because all bindgen generated types are simple integer types for
which any bit pattern, including all zeros, is valid.
Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
drivers/gpu/nova-core/gsp/fw/r570_144.rs | 1 +
drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs | 16 ++++++++--------
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144.rs b/drivers/gpu/nova-core/gsp/fw/r570_144.rs
index 82a973cd99c3..4f5c65ac1eb9 100644
--- a/drivers/gpu/nova-core/gsp/fw/r570_144.rs
+++ b/drivers/gpu/nova-core/gsp/fw/r570_144.rs
@@ -25,4 +25,5 @@
unsafe_op_in_unsafe_fn
)]
use kernel::ffi;
+use kernel::prelude::Zeroable;
include!("r570_144/bindings.rs");
diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs
index 392b25dc6991..f7b38978c5f8 100644
--- a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs
+++ b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs
@@ -20,7 +20,7 @@
pub type u32_ = __u32;
pub type u64_ = __u64;
#[repr(C)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Zeroable)]
pub struct GspFwWprMeta {
pub magic: u64_,
pub revision: u64_,
@@ -55,19 +55,19 @@ pub struct GspFwWprMeta {
pub verified: u64_,
}
#[repr(C)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Zeroable)]
pub union GspFwWprMeta__bindgen_ty_1 {
pub __bindgen_anon_1: GspFwWprMeta__bindgen_ty_1__bindgen_ty_1,
pub __bindgen_anon_2: GspFwWprMeta__bindgen_ty_1__bindgen_ty_2,
}
#[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Default, Copy, Clone, Zeroable)]
pub struct GspFwWprMeta__bindgen_ty_1__bindgen_ty_1 {
pub sysmemAddrOfSignature: u64_,
pub sizeOfSignature: u64_,
}
#[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Default, Copy, Clone, Zeroable)]
pub struct GspFwWprMeta__bindgen_ty_1__bindgen_ty_2 {
pub gspFwHeapFreeListWprOffset: u32_,
pub unused0: u32_,
@@ -83,13 +83,13 @@ fn default() -> Self {
}
}
#[repr(C)]
-#[derive(Copy, Clone)]
+#[derive(Copy, Clone, Zeroable)]
pub union GspFwWprMeta__bindgen_ty_2 {
pub __bindgen_anon_1: GspFwWprMeta__bindgen_ty_2__bindgen_ty_1,
pub __bindgen_anon_2: GspFwWprMeta__bindgen_ty_2__bindgen_ty_2,
}
#[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Default, Copy, Clone, Zeroable)]
pub struct GspFwWprMeta__bindgen_ty_2__bindgen_ty_1 {
pub partitionRpcAddr: u64_,
pub partitionRpcRequestOffset: u16_,
@@ -101,7 +101,7 @@ pub struct GspFwWprMeta__bindgen_ty_2__bindgen_ty_1 {
pub lsUcodeVersion: u32_,
}
#[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Default, Copy, Clone, Zeroable)]
pub struct GspFwWprMeta__bindgen_ty_2__bindgen_ty_2 {
pub partitionRpcPadding: [u32_; 4usize],
pub sysmemAddrOfCrashReportQueue: u64_,
@@ -136,7 +136,7 @@ fn default() -> Self {
pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_FB: LibosMemoryRegionLoc = 2;
pub type LibosMemoryRegionLoc = ffi::c_uint;
#[repr(C)]
-#[derive(Debug, Default, Copy, Clone)]
+#[derive(Debug, Default, Copy, Clone, Zeroable)]
pub struct LibosMemoryRegionInitArgument {
pub id8: LibosAddress,
pub pa: LibosAddress,
--
2.51.0
next prev parent reply other threads:[~2025-10-29 8:17 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 8:16 [PATCH v7 00/14] gpu: nova-core: Boot GSP to RISC-V active Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 01/14] gpu: nova-core: compute layout of more framebuffer regions required for GSP Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 02/14] gpu: nova-core: Set correct DMA mask Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 03/14] gpu: nova-core: num: add functions to safely convert a const value to a smaller type Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 04/14] gpu: nova-core: Create initial Gsp Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 05/14] gpu: nova-core: gsp: Create wpr metadata Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 06/14] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure Alexandre Courbot
2025-10-29 8:16 ` Alexandre Courbot [this message]
2025-10-29 8:16 ` [PATCH v7 08/14] rust: enable slice_flatten feature and abstract it through an extension trait Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 09/14] gpu: nova-core: gsp: Add GSP command queue bindings and handling Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 10/14] gpu: nova-core: gsp: Create rmargs Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 11/14] gpu: nova-core: gsp: Add RM registry and sysinfo bindings and commands Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 12/14] nova-core: falcon: Add support to check if RISC-V is active Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 13/14] nova-core: falcon: Add support to write firmware version Alexandre Courbot
2025-10-29 8:16 ` [PATCH v7 14/14] nova-core: gsp: Boot GSP Alexandre Courbot
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