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[47.55.120.4]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8b3295c1328sm451262285a.27.2025.11.21.15.28.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Nov 2025 15:28:34 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vMaYL-00000001bZj-1HN0; Fri, 21 Nov 2025 19:28:33 -0400 Date: Fri, 21 Nov 2025 19:28:33 -0400 From: Jason Gunthorpe To: Peter Colberg Cc: Danilo Krummrich , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang Subject: Re: [PATCH 3/8] rust: pci: add {enable,disable}_sriov(), to control SR-IOV capability Message-ID: <20251121232833.GH233636@ziepe.ca> References: <20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com> <20251119-rust-pci-sriov-v1-3-883a94599a97@redhat.com> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251119-rust-pci-sriov-v1-3-883a94599a97@redhat.com> On Wed, Nov 19, 2025 at 05:19:07PM -0500, Peter Colberg wrote: > Add methods to enable and disable the Single Root I/O Virtualization > (SR-IOV) capability for a PCI device. The wrapped C methods take care > of validating whether the device is a Physical Function (PF), whether > SR-IOV is currently disabled (or enabled), and whether the number of > requested VFs does not exceed the total number of supported VFs. > > Suggested-by: Danilo Krummrich > Signed-off-by: Peter Colberg > --- > rust/kernel/pci.rs | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs > index 814990d386708fe2ac652ccaa674c10a6cf390cb..556a01ed9bc3b1300a3340a3d2383e08ceacbfe5 100644 > --- a/rust/kernel/pci.rs > +++ b/rust/kernel/pci.rs > @@ -454,6 +454,36 @@ pub fn set_master(&self) { > // SAFETY: `self.as_raw` is guaranteed to be a pointer to a valid `struct pci_dev`. > unsafe { bindings::pci_set_master(self.as_raw()) }; > } > + > + /// Enable the Single Root I/O Virtualization (SR-IOV) capability for this device, > + /// where `nr_virtfn` is number of Virtual Functions (VF) to enable. > + #[cfg(CONFIG_PCI_IOV)] > + pub fn enable_sriov(&self, nr_virtfn: i32) -> Result { > + // SAFETY: > + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. > + // > + // `pci_enable_sriov()` checks that the enable operation is valid: > + // - the device is a Physical Function (PF), > + // - SR-IOV is currently disabled, and > + // - `nr_virtfn` does not exceed the total number of supported VFs. > + let ret = unsafe { bindings::pci_enable_sriov(self.as_raw(), nr_virtfn) }; > + if ret != 0 { > + return Err(crate::error::Error::from_errno(ret)); > + } > + Ok(()) > + } > + > + /// Disable the Single Root I/O Virtualization (SR-IOV) capability for this device. > + #[cfg(CONFIG_PCI_IOV)] > + pub fn disable_sriov(&self) { > + // SAFETY: > + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. > + // > + // `pci_disable_sriov()` checks that the disable operation is valid: > + // - the device is a Physical Function (PF), and > + // - SR-IOV is currently enabled. > + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; > + } Both these functions should only be called on bound devices - the safety statement should call it out, does the code require it? Also per my other email SRIOV should be disabled before a driver can be unbound, this patch should take care of it to not introduce an dangerous enable_sriov(). Jason