From: Zhi Wang <zhiw@nvidia.com>
To: Joel Fernandes <joelagnelf@nvidia.com>
Cc: <rust-for-linux@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<nouveau@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>,
<airlied@gmail.com>, <dakr@kernel.org>, <aliceryhl@google.com>,
<bhelgaas@google.com>, <kwilczynski@kernel.org>,
<ojeda@kernel.org>, <alex.gaynor@gmail.com>,
<boqun.feng@gmail.com>, <gary@garyguo.net>,
<bjorn3_gh@protonmail.com>, <lossin@kernel.org>,
<a.hindborg@kernel.org>, <tmgross@umich.edu>,
<markus.probst@posteo.de>, <helgaas@kernel.org>,
<cjia@nvidia.com>, <alex@shazbot.org>, <smitra@nvidia.com>,
<ankita@nvidia.com>, <aniketa@nvidia.com>, <kwankhede@nvidia.com>,
<targupta@nvidia.com>, <acourbot@nvidia.com>,
<jhubbard@nvidia.com>, <zhiwang@kernel.org>
Subject: Re: [RFC 4/7] gpu: nova-core: populate GSP_VF_INFO when vGPU is enabled
Date: Tue, 9 Dec 2025 15:41:14 +0200 [thread overview]
Message-ID: <20251209154114.09cf245b@inno-ThinkPad-X280> (raw)
In-Reply-To: <9cf6135e-43c4-4c31-acf5-03fbe32e2bae@nvidia.com>
On Sat, 6 Dec 2025 21:32:51 -0500
Joel Fernandes <joelagnelf@nvidia.com> wrote:
> Hi Zhi,
>
> On 12/6/2025 7:42 AM, Zhi Wang wrote:
snip
==
> > 0x00000004); +
> > + let val = bar.read32(0x88000 + 0xbfc);
> > + info.b64bitBar2 = u8::from((val & 0x00000006) ==
> > 0x00000004);
>
> Please no magic numbers, please use proper named constants with
> documentation comments explaining the values.
>
> Also BAR reads here need proper register macro definitions/access.
>
That is true. :) But this is because there is no register definition in
the OpenRM code/non OpenRM code as well. I have no idea about the name
and bit definitions of this register.
Suppose I will have to find some clues from some folks then document
them here when going to patches request for merged. :)
> Also the above code is lacking in comments. All the steps above need
> proper comments IMO.
>
> General philosophy of Nova is it is a well documented, cleanly
> written driver with minimal/no magic numbers and abundant comments. :)
>
Agree. :)
> Thanks.
>
next prev parent reply other threads:[~2025-12-09 13:41 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-06 12:42 [RFC 0/7] gpu: nova-core: Enable booting GSP with vGPU enabled Zhi Wang
2025-12-06 12:42 ` [RFC 1/7] rust: pci: expose sriov_get_totalvfs() helper Zhi Wang
2025-12-07 7:12 ` Dirk Behme
2025-12-09 1:09 ` Miguel Ojeda
2025-12-09 14:22 ` Zhi Wang
2025-12-09 3:42 ` Alexandre Courbot
2025-12-10 11:31 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 2/7] [!UPSTREAM] rust: pci: support configuration space access Zhi Wang
2025-12-10 22:51 ` Ewan CHORYNSKI
2025-12-06 12:42 ` [RFC 3/7] gpu: nova-core: introduce vgpu_support module param Zhi Wang
2025-12-06 12:42 ` [RFC 4/7] gpu: nova-core: populate GSP_VF_INFO when vGPU is enabled Zhi Wang
2025-12-07 2:32 ` Joel Fernandes
2025-12-09 13:41 ` Zhi Wang [this message]
2025-12-11 8:36 ` Joel Fernandes
2025-12-12 0:16 ` John Hubbard
2025-12-12 0:29 ` Joel Fernandes
2025-12-10 14:27 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 5/7] gpu: nova-core: set RMSetSriovMode when NVIDIA " Zhi Wang
2025-12-07 15:55 ` Timur Tabi
2025-12-07 16:57 ` Joel Fernandes
2025-12-09 14:28 ` Zhi Wang
2025-12-15 4:28 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 6/7] gpu: nova-core: reserve a larger GSP WPR2 heap when " Zhi Wang
2025-12-15 4:35 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 7/7] gpu: nova-core: load the scrubber ucode when vGPU support " Zhi Wang
2025-12-07 2:26 ` Joel Fernandes
2025-12-09 14:05 ` Zhi Wang
2025-12-11 1:24 ` Joel Fernandes
2025-12-07 6:42 ` Dirk Behme
2025-12-15 4:45 ` Alexandre Courbot
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