From: Timur Tabi <ttabi@nvidia.com>
To: Gary Guo <gary@garyguo.net>, Danilo Krummrich <dakr@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
John Hubbard <jhubbard@nvidia.com>,
"Joel Fernandes" <joelagnelf@nvidia.com>,
<rust-for-linux@vger.kernel.org>, <nouveau@lists.freedesktop.org>
Subject: [PATCH v8 05/13] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem()
Date: Thu, 22 Jan 2026 16:28:40 -0600 [thread overview]
Message-ID: <20260122222848.2555890-6-ttabi@nvidia.com> (raw)
In-Reply-To: <20260122222848.2555890-1-ttabi@nvidia.com>
The with_falcon_mem() method initializes the 'imem' and 'sec' fields of
the NV_PFALCON_FALCON_DMATRFCMD register based on the value of
the FalconMem type.
Signed-off-by: Timur Tabi <ttabi@nvidia.com>
Reviewed-by: John Hubbard <jhubbard@nvidia.com>
---
drivers/gpu/nova-core/falcon.rs | 14 +++-----------
drivers/gpu/nova-core/regs.rs | 9 +++++++++
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 0d1a0f86d83c..3629422e7a52 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -458,7 +458,6 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
fw: &F,
target_mem: FalconMem,
load_offsets: FalconLoadTarget,
- sec: bool,
) -> Result {
const DMA_LEN: u32 = 256;
@@ -526,8 +525,7 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
let cmd = regs::NV_PFALCON_FALCON_DMATRFCMD::default()
.set_size(DmaTrfCmdSize::Size256B)
- .set_imem(target_mem != FalconMem::Dmem)
- .set_sec(if sec { 1 } else { 0 });
+ .with_falcon_mem(target_mem);
for pos in (0..num_transfers).map(|i| i * DMA_LEN) {
// Perform a transfer of size `DMA_LEN`.
@@ -567,14 +565,8 @@ pub(crate) fn dma_load<F: FalconFirmware<Target = E>>(&self, bar: &Bar0, fw: &F)
.set_mem_type(FalconFbifMemType::Physical)
});
- self.dma_wr(
- bar,
- fw,
- FalconMem::ImemSecure,
- fw.imem_sec_load_params(),
- true,
- )?;
- self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params(), true)?;
+ self.dma_wr(bar, fw, FalconMem::ImemSecure, fw.imem_sec_load_params())?;
+ self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params())?;
self.hal.program_brom(self, bar, &fw.brom_params())?;
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 82cc6c0790e5..b8ddfe2e5ae7 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -16,6 +16,7 @@
FalconCoreRevSubversion,
FalconFbifMemType,
FalconFbifTarget,
+ FalconMem,
FalconModSelAlgo,
FalconSecurityModel,
PFalcon2Base,
@@ -325,6 +326,14 @@ pub(crate) fn mem_scrubbing_done(self) -> bool {
16:16 set_dmtag as u8;
});
+impl NV_PFALCON_FALCON_DMATRFCMD {
+ /// Programs the `imem` and `sec` fields for the given FalconMem
+ pub(crate) fn with_falcon_mem(self, mem: FalconMem) -> Self {
+ self.set_imem(mem != FalconMem::Dmem)
+ .set_sec(if mem == FalconMem::ImemSecure { 1 } else { 0 })
+ }
+}
+
register!(NV_PFALCON_FALCON_DMATRFFBOFFS @ PFalconBase[0x0000011c] {
31:0 offs as u32;
});
--
2.52.0
next prev parent reply other threads:[~2026-01-22 23:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 22:28 [PATCH v8 00/13] gpu: nova-core: add Turing support Timur Tabi
2026-01-22 22:28 ` [PATCH v8 01/13] gpu: nova-core: rename Imem to ImemSecure Timur Tabi
2026-01-22 22:28 ` [PATCH v8 02/13] gpu: nova-core: add ImemNonSecure section infrastructure Timur Tabi
2026-01-23 18:07 ` Gary Guo
2026-01-23 23:02 ` Alexandre Courbot
2026-01-22 22:28 ` [PATCH v8 03/13] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2026-01-22 22:28 ` [PATCH v8 04/13] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2026-01-22 22:28 ` Timur Tabi [this message]
2026-01-22 22:28 ` [PATCH v8 06/13] gpu: nova-core: move some functions into the HAL Timur Tabi
2026-01-22 22:28 ` [PATCH v8 07/13] gpu: nova-core: Add basic Turing HAL Timur Tabi
2026-01-22 22:28 ` [PATCH v8 08/13] gpu: nova-core: add NV_PFALCON_FALCON_ENGINE::reset_engine() Timur Tabi
2026-01-22 22:28 ` [PATCH v8 09/13] gpu: nova-core: add Falcon HAL method load_method() Timur Tabi
2026-01-24 2:26 ` Alexandre Courbot
2026-01-24 4:56 ` Timur Tabi
2026-01-24 11:56 ` Miguel Ojeda
2026-01-24 12:04 ` Danilo Krummrich
2026-01-24 12:40 ` Alexandre Courbot
2026-01-22 22:28 ` [PATCH v8 10/13] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2026-01-22 22:28 ` [PATCH v8 11/13] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size Timur Tabi
2026-01-23 18:14 ` Gary Guo
2026-01-23 18:41 ` Timur Tabi
2026-01-23 20:15 ` John Hubbard
2026-01-23 22:54 ` Alexandre Courbot
2026-01-22 22:28 ` [PATCH v8 12/13] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2026-01-22 22:28 ` [PATCH v8 13/13] gpu: nova-core: use the Generic Bootloader to boot FWSEC Timur Tabi
2026-01-23 12:20 ` [PATCH v8 00/13] gpu: nova-core: add Turing support Danilo Krummrich
2026-01-24 2:27 ` Alexandre Courbot
2026-01-23 18:36 ` Gary Guo
2026-01-23 23:01 ` Alexandre Courbot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260122222848.2555890-6-ttabi@nvidia.com \
--to=ttabi@nvidia.com \
--cc=acourbot@nvidia.com \
--cc=dakr@kernel.org \
--cc=gary@garyguo.net \
--cc=jhubbard@nvidia.com \
--cc=joelagnelf@nvidia.com \
--cc=nouveau@lists.freedesktop.org \
--cc=rust-for-linux@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox