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Mon, 2 Feb 2026 11:57:16 -0800 Date: Mon, 2 Feb 2026 21:57:15 +0200 From: Zhi Wang To: Zijing Zhang CC: Gary Guo , , , , , , , , Subject: Re: [PATCH v5 0/2] rust: pci: add capability lookup helpers Message-ID: <20260202215715.1000e2eb.zhiw@nvidia.com> In-Reply-To: <2f385010-0a47-4d0f-8554-b841f6026561@ry.rs> References: <20260201074248.1629393-1-zijing.zhang@ry.rs> <2f385010-0a47-4d0f-8554-b841f6026561@ry.rs> Organization: NVIDIA X-Mailer: Claws Mail 4.3.1 (GTK 3.24.33; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37B:EE_|SJ1PR12MB6075:EE_ X-MS-Office365-Filtering-Correlation-Id: 84069bce-b753-410e-97c8-08de629548b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024|7053199007|13003099007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oY5tezDWnMRp9zpEt3E+CHzoKJ7tUiZVjrBarjiO+uxsBH1cw4bb2axt/aHmDtGk2zf28n0Ba1Hel+4vtLdVNur1jbs1BUvq/KypasJxN/2M9dwQn7ll5I5D+SClWU0UBvvBIvWak6iJ+91XUf3Kc9HoGNG7fgKsZWPnZnGeIIvjaimXS5FwkdNn2ws40/YNkwRrr7IRW+T05ZqVDPP4Vco44VUKWO8hwWxc5cdhWUFgagSaYSa80Er/6cah9Rw4NBUeWlJnzQMSrK6kkuZcSJi7hMqMj2jncKsyS0iVtR+dzC0Lw6ZpsTzy7fDZeUdwhlVNW7XeApUz8e8MojX+gHSywu+r94EfPpIRc6W8gZ6RRoSFq1G3bZmapPh//6Hg99XGck5lvIms4mkns6kEJTpbcpkmgkq6dEN69XACs8LKr5GXZ+1PyLDc+Jj8nKSZ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2026 19:57:24.1778 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 84069bce-b753-410e-97c8-08de629548b7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6075 On Mon, 2 Feb 2026 23:41:42 +0800 Zijing Zhang wrote: > > Hi Zijing, Good to see you working on this too! Welcome to join the party! I think "thin wrappers" were indeed the initial thought for many of us. However, after several rounds of discussions with maintainers at the summits, the requirement has shifted towards a stricter, OO-style Rust abstraction rather than direct wrappers. The key takeaways for the current direction are: - Enforcing boundary checks via the Io trait backend. - Using register! macros for definitions. - Implementing proper Rust iterators for Cap discovery. Since nova-core relies on these specific safety features, I'm pushing forward with this high-level abstraction. For nova-core, our immediate need is accessing and reading registers in the SR-IOV capability. That said, there is plenty of room for collaboration to achieve a complete framework! For example, support for normal configuration space capabilities, the iterator implementation itself, and capabilities other than SR-IOV are all areas that need work. Currently, I am waiting for Alex's Io trait cleanup and refactor to settle before deciding what should be included or changed in my next re-spin. Also, any input on how to best organize the traits between normal configuration space caps and extended caps would be much appreciated! You are also welcome to reach out via Zulip for a quick discussion or catch-up. Z. > On 2/2/2026 11:02 PM, Gary Guo wrote: > > On Sun Feb 1, 2026 at 7:42 AM GMT, Zijing Zhang wrote: > >> It introduces `pci::Device::{find_capability, find_ext_capability}`, > >> thin wrappers around the PCI core helpers (`pci_find_capability()` and > >> `pci_find_ext_capability()`), returning the config-space offset when > >> present. > >> > >> In `pci::CapabilityId` and `pci::ExtendedCapabilityId`, Capability > >> IDs are wrapped as newtypes with `from_raw()` plus a set of common > >> constants. > >> > >> An in-tree user is added to Rust PCI driver sample to exercise the > >> new API. > >> > >> Previous versions (v4) > >> https://lore.kernel.org/rust-for-linux/20260201071450.1614172-1-zijing.zhang@ry.rs/ > > > > Also I'd like to mention that Zhi Wang already have a version adding > > the same feature on the list, sent before your v1: > > > > https://lore.kernel.org/rust-for-linux/20260126215957.541180-3-zhiw@nvidia.com/ > > > > I'd recommend to work together for the feature rather than creating > > competing series. > > > > Thanks, > > Gary > > > >> > >> Testing > >> --- > >> > >> Build > >> - x86_64 defconfig-based kernel with Rust enabled (out-of-tree build) > >> - `CONFIG_SAMPLES_RUST=y` > >> - `CONFIG_SAMPLE_RUST_DRIVER_PCI=y` > >> > >> Runtime > >> - QEMU x86_64 (i440FX) with `-device pci-testdev` > >> - QEMU x86_64 (q35) with an NVMe device > >> > >> Changelog > >> --- > >> > >> v2 > >> - Run rustfmt on samples/rust/rust_driver_pci.rs to fix rustfmtcheck. > >> > >> v3 > >> - Base on pci/next. > >> - Add `CapabilityId`/`ExtendedCapabilityId`, switch > >> `find_*capability()` to use them. > >> - Document the common ID constants. > >> - Update the sample to use typed IDs and exercise the new helpers. > >> > >> v4 > >> - Minor doc/style nits. > >> - Use early-return style in `find_*capability()`. > >> > >> > >> v5 (current) > >> - Fix sample build by using `pdev.as_ref()` for `dev_info!`. > >> - Use `as _` in constant definitions. > >> > >> Zijing Zhang (2): > >> rust: pci: add capability lookup helpers > >> samples: rust: pci: exercise capability lookup > >> > >> rust/kernel/pci.rs | 150 > >> ++++++++++++++++++++++++++++++++ samples/rust/rust_driver_pci.rs | > >> 31 +++++++ 2 files changed, 181 insertions(+) > >> > >> > >> base-commit: ff0e2f679ab0de50a2e9e88fabc1026bc3be04ba > > > > > On 2/2/2026 11:02 PM, Gary Guo wrote: > > On Sun Feb 1, 2026 at 7:42 AM GMT, Zijing Zhang wrote: > >> It introduces `pci::Device::{find_capability, find_ext_capability}`, > thin > >> wrappers around the PCI core helpers (`pci_find_capability()` and > >> `pci_find_ext_capability()`), returning the config-space offset when > present. > >> > >> In `pci::CapabilityId` and `pci::ExtendedCapabilityId`, Capability > IDs are > >> wrapped as newtypes with `from_raw()` plus a set of common constants. > >> > >> An in-tree user is added to Rust PCI driver sample to exercise the > new API. > >> > >> Previous versions (v4) > >> > https://lore.kernel.org/rust-for-linux/20260201071450.1614172-1-zijing.zhang@ry.rs/ > > > > Also I'd like to mention that Zhi Wang already have a version adding > the same > > feature on the list, sent before your v1: > > > > > https://lore.kernel.org/rust-for-linux/20260126215957.541180-3-zhiw@nvidia.com/ > > > > I'd recommend to work together for the feature rather than creating > competing > > series. > > > > Thanks, > > Gary > > > >> > >> Testing > >> --- > >> > >> Build > >> - x86_64 defconfig-based kernel with Rust enabled (out-of-tree build) > >> - `CONFIG_SAMPLES_RUST=y` > >> - `CONFIG_SAMPLE_RUST_DRIVER_PCI=y` > >> > >> Runtime > >> - QEMU x86_64 (i440FX) with `-device pci-testdev` > >> - QEMU x86_64 (q35) with an NVMe device > >> > >> Changelog > >> --- > >> > >> v2 > >> - Run rustfmt on samples/rust/rust_driver_pci.rs to fix rustfmtcheck. > >> > >> v3 > >> - Base on pci/next. > >> - Add `CapabilityId`/`ExtendedCapabilityId`, switch > >> `find_*capability()` to use them. > >> - Document the common ID constants. > >> - Update the sample to use typed IDs and exercise the new helpers. > >> > >> v4 > >> - Minor doc/style nits. > >> - Use early-return style in `find_*capability()`. > >> > >> > >> v5 (current) > >> - Fix sample build by using `pdev.as_ref()` for `dev_info!`. > >> - Use `as _` in constant definitions. > >> > >> Zijing Zhang (2): > >> rust: pci: add capability lookup helpers > >> samples: rust: pci: exercise capability lookup > >> > >> rust/kernel/pci.rs | 150 > >> ++++++++++++++++++++++++++++++++ samples/rust/rust_driver_pci.rs | > >> 31 +++++++ 2 files changed, 181 insertions(+) > >> > >> > >> base-commit: ff0e2f679ab0de50a2e9e88fabc1026bc3be04ba > > > > Hi Gary and all, > > Thanks for the feedback. > > Zhi's work on SR-IOV is excellent and provides a higher-level > abstraction. My series focuses on providing the fundamental lookup > infrastructure and typed IDs, which are intended to serve as a > general-purpose foundation for any PCI capability interaction. > > These two series appear to be complementary. I am open to any > integration path the maintainers prefer and would welcome Zhi's thoughts > on how we might best align these efforts. > > As a newcomer to the community, I am passionate about Rust PCI driver > development and appreciate Gary's diligence in maintaining the > subsystem's quality. I've taken note of the feedback regarding the patch > frequency and will ensure to allow more time for review in future > iterations. > > Thanks, > Zijing >