From: John Hubbard <jhubbard@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
Alexandre Courbot <acourbot@nvidia.com>
Cc: "Joel Fernandes" <joelagnelf@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Eliot Courtney" <ecourtney@nvidia.com>,
"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
nouveau@lists.freedesktop.org, rust-for-linux@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>,
"John Hubbard" <jhubbard@nvidia.com>
Subject: [PATCH v5 27/38] gpu: nova-core: Hopper/Blackwell: add FSP send/receive messaging
Date: Fri, 20 Feb 2026 18:09:41 -0800 [thread overview]
Message-ID: <20260221020952.412352-28-jhubbard@nvidia.com> (raw)
In-Reply-To: <20260221020952.412352-1-jhubbard@nvidia.com>
Add send_sync_fsp() which sends an MCTP/NVDM message to FSP and waits
for the response. Response validation uses the typed MctpHeader and
NvdmHeader wrappers from the previous commit.
A MessageToFsp trait provides the NVDM type constant for each message
struct, so send_sync_fsp() can verify that the response matches the
request.
Cc: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
---
drivers/gpu/nova-core/falcon/fsp.rs | 3 -
drivers/gpu/nova-core/fsp.rs | 107 +++++++++++++++++++++++++++-
2 files changed, 105 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon/fsp.rs b/drivers/gpu/nova-core/falcon/fsp.rs
index d68a75a121f0..b5a0a2631ec7 100644
--- a/drivers/gpu/nova-core/falcon/fsp.rs
+++ b/drivers/gpu/nova-core/falcon/fsp.rs
@@ -152,7 +152,6 @@ pub(crate) fn read_emem(&self, bar: &Bar0, offset: u32, data: &mut [u8]) -> Resu
///
/// The FSP message queue is not circular - pointers are reset to 0 after each
/// message exchange, so `tail >= head` is always true when data is present.
- #[expect(unused)]
pub(crate) fn poll_msgq(&self, bar: &Bar0) -> u32 {
let head = regs::NV_PFSP_MSGQ_HEAD::read(bar).address();
let tail = regs::NV_PFSP_MSGQ_TAIL::read(bar).address();
@@ -175,7 +174,6 @@ pub(crate) fn poll_msgq(&self, bar: &Bar0) -> u32 {
///
/// # Returns
/// `Ok(())` on success, `Err(EINVAL)` if packet is empty or not 4-byte aligned
- #[expect(unused)]
pub(crate) fn send_msg(&self, bar: &Bar0, packet: &[u8]) -> Result {
if packet.is_empty() {
return Err(EINVAL);
@@ -207,7 +205,6 @@ pub(crate) fn send_msg(&self, bar: &Bar0, packet: &[u8]) -> Result {
///
/// # Returns
/// `Ok(bytes_read)` on success, `Err(EINVAL)` if size is 0, exceeds buffer, or not aligned
- #[expect(unused)]
pub(crate) fn recv_msg(&self, bar: &Bar0, buffer: &mut [u8], size: usize) -> Result<usize> {
if size == 0 || size > buffer.len() {
return Err(EINVAL);
diff --git a/drivers/gpu/nova-core/fsp.rs b/drivers/gpu/nova-core/fsp.rs
index 29707578d4d4..20c439fc7f7b 100644
--- a/drivers/gpu/nova-core/fsp.rs
+++ b/drivers/gpu/nova-core/fsp.rs
@@ -19,6 +19,15 @@
use crate::regs;
+use crate::mctp::{
+ MctpHeader,
+ NvdmHeader,
+ NvdmType, //
+};
+
+/// FSP message timeout in milliseconds.
+const FSP_MSG_TIMEOUT_MS: i64 = 2000;
+
/// FSP secure boot completion timeout in milliseconds.
const FSP_SECURE_BOOT_TIMEOUT_MS: i64 = 4000;
@@ -159,7 +168,6 @@ struct NvdmPayloadCot {
/// Complete FSP message structure with MCTP and NVDM headers.
#[repr(C, packed)]
#[derive(Clone, Copy)]
-#[expect(dead_code)]
struct FspMessage {
mctp_header: u32,
nvdm_header: u32,
@@ -172,7 +180,6 @@ unsafe impl AsBytes for FspMessage {}
/// Complete FSP response structure with MCTP and NVDM headers.
#[repr(C, packed)]
#[derive(Clone, Copy)]
-#[expect(dead_code)]
struct FspResponse {
mctp_header: u32,
nvdm_header: u32,
@@ -182,6 +189,19 @@ struct FspResponse {
// SAFETY: FspResponse is a packed C struct with only integral fields.
unsafe impl FromBytes for FspResponse {}
+/// Trait implemented by types representing a message to send to FSP.
+///
+/// This provides [`Fsp::send_sync_fsp`] with the information it needs to send
+/// a given message, following the same pattern as GSP's `CommandToGsp`.
+pub(crate) trait MessageToFsp: AsBytes {
+ /// NVDM type identifying this message to FSP.
+ const NVDM_TYPE: u32;
+}
+
+impl MessageToFsp for FspMessage {
+ const NVDM_TYPE: u32 = NvdmType::Cot as u32;
+}
+
/// FSP interface for Hopper/Blackwell GPUs.
pub(crate) struct Fsp;
@@ -275,4 +295,87 @@ pub(crate) fn extract_fmc_signatures(
Ok(signatures)
}
+
+ /// Send message to FSP and wait for response.
+ #[expect(dead_code)]
+ fn send_sync_fsp<M>(
+ dev: &device::Device<device::Bound>,
+ bar: &crate::driver::Bar0,
+ fsp_falcon: &crate::falcon::Falcon<crate::falcon::fsp::Fsp>,
+ msg: &M,
+ ) -> Result
+ where
+ M: MessageToFsp,
+ {
+ fsp_falcon.send_msg(bar, msg.as_bytes())?;
+
+ let timeout = Delta::from_millis(FSP_MSG_TIMEOUT_MS);
+ let packet_size = read_poll_timeout(
+ || Ok(fsp_falcon.poll_msgq(bar)),
+ |&size| size > 0,
+ Delta::from_millis(10),
+ timeout,
+ )
+ .map_err(|_| {
+ dev_err!(dev, "FSP response timeout\n");
+ ETIMEDOUT
+ })?;
+
+ let packet_size = packet_size as usize;
+ let mut response_buf = KVec::<u8>::new();
+ response_buf.resize(packet_size, 0, GFP_KERNEL)?;
+ fsp_falcon.recv_msg(bar, &mut response_buf, packet_size)?;
+
+ if response_buf.len() < core::mem::size_of::<FspResponse>() {
+ dev_err!(dev, "FSP response too small: {}\n", response_buf.len());
+ return Err(EIO);
+ }
+
+ let response = FspResponse::from_bytes(&response_buf[..]).ok_or(EIO)?;
+
+ let mctp_header: MctpHeader = response.mctp_header.into();
+ let nvdm_header: NvdmHeader = response.nvdm_header.into();
+ let command_nvdm_type = response.response.command_nvdm_type;
+ let error_code = response.response.error_code;
+
+ if !mctp_header.is_single_packet() {
+ dev_err!(
+ dev,
+ "Unexpected MCTP header in FSP reply: {:#x}\n",
+ mctp_header.raw()
+ );
+ return Err(EIO);
+ }
+
+ if !nvdm_header.validate(NvdmType::FspResponse) {
+ dev_err!(
+ dev,
+ "Unexpected NVDM header in FSP reply: {:#x}\n",
+ nvdm_header.raw()
+ );
+ return Err(EIO);
+ }
+
+ if command_nvdm_type != M::NVDM_TYPE {
+ dev_err!(
+ dev,
+ "Expected NVDM type {:#x} in reply, got {:#x}\n",
+ M::NVDM_TYPE,
+ command_nvdm_type
+ );
+ return Err(EIO);
+ }
+
+ if error_code != 0 {
+ dev_err!(
+ dev,
+ "NVDM command {:#x} failed with error {:#x}\n",
+ M::NVDM_TYPE,
+ error_code
+ );
+ return Err(EIO);
+ }
+
+ Ok(())
+ }
}
--
2.53.0
next prev parent reply other threads:[~2026-02-21 2:11 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-21 2:09 [PATCH v5 00/38] gpu: nova-core: firmware: Hopper/Blackwell support John Hubbard
2026-02-21 2:09 ` [PATCH v5 01/38] gpu: nova-core: fix aux device registration for multi-GPU systems John Hubbard
2026-02-24 14:47 ` Danilo Krummrich
2026-02-27 15:37 ` Gary Guo
2026-02-27 15:41 ` Gary Guo
2026-02-27 16:05 ` Danilo Krummrich
2026-02-27 16:29 ` John Hubbard
2026-02-21 2:09 ` [PATCH v5 02/38] gpu: nova-core: pass pdev directly to dev_* logging macros John Hubbard
2026-02-21 2:09 ` [PATCH v5 03/38] gpu: nova-core: print FB sizes, along with ranges John Hubbard
2026-02-21 2:09 ` [PATCH v5 04/38] gpu: nova-core: add FbRange.len() and use it in boot.rs John Hubbard
2026-02-21 2:09 ` [PATCH v5 05/38] gpu: nova-core: Hopper/Blackwell: basic GPU identification John Hubbard
2026-02-21 2:09 ` [PATCH v5 06/38] gpu: nova-core: factor .fwsignature* selection into a new find_gsp_sigs_section() John Hubbard
2026-02-21 2:09 ` [PATCH v5 07/38] gpu: nova-core: use GPU Architecture to simplify HAL selections John Hubbard
2026-02-21 2:09 ` [PATCH v5 08/38] gpu: nova-core: apply the one "use" item per line policy to commands.rs John Hubbard
2026-02-21 2:09 ` [PATCH v5 09/38] gpu: nova-core: move GPU init and DMA mask setup into Gpu::new() John Hubbard
2026-02-21 2:09 ` [PATCH v5 10/38] gpu: nova-core: set DMA mask width based on GPU architecture John Hubbard
2026-02-21 2:09 ` [PATCH v5 11/38] gpu: nova-core: Hopper/Blackwell: skip GFW boot waiting John Hubbard
2026-02-21 2:09 ` [PATCH v5 12/38] gpu: nova-core: move firmware image parsing code to firmware.rs John Hubbard
2026-02-21 2:09 ` [PATCH v5 13/38] gpu: nova-core: factor out an elf_str() function John Hubbard
2026-02-21 2:09 ` [PATCH v5 14/38] gpu: nova-core: don't assume 64-bit firmware images John Hubbard
2026-02-21 2:09 ` [PATCH v5 15/38] gpu: nova-core: add support for 32-bit " John Hubbard
2026-02-21 2:09 ` [PATCH v5 16/38] gpu: nova-core: add auto-detection of 32-bit, 64-bit " John Hubbard
2026-02-21 2:09 ` [PATCH v5 17/38] gpu: nova-core: Hopper/Blackwell: add FMC firmware image, in support of FSP John Hubbard
2026-02-21 2:09 ` [PATCH v5 18/38] gpu: nova-core: Hopper/Blackwell: add FSP falcon engine stub John Hubbard
2026-02-21 2:09 ` [PATCH v5 19/38] gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operations John Hubbard
2026-02-21 2:09 ` [PATCH v5 20/38] gpu: nova-core: Hopper/Blackwell: add FSP message infrastructure John Hubbard
2026-02-21 2:09 ` [PATCH v5 21/38] rust: ptr: add const_align_up() and enable inline_const feature John Hubbard
2026-02-21 20:50 ` Miguel Ojeda
2026-02-22 19:03 ` John Hubbard
2026-02-22 19:08 ` Miguel Ojeda
2026-02-23 3:36 ` Alexandre Courbot
2026-02-22 7:46 ` Gary Guo
2026-02-22 19:04 ` John Hubbard
2026-02-23 11:07 ` Danilo Krummrich
2026-02-23 14:16 ` Gary Guo
2026-02-23 14:20 ` Danilo Krummrich
2026-03-04 3:47 ` John Hubbard
2026-03-04 11:18 ` Gary Guo
2026-03-04 18:53 ` John Hubbard
2026-03-04 19:04 ` Gary Guo
2026-03-04 19:14 ` John Hubbard
2026-03-05 1:23 ` Alexandre Courbot
2026-03-05 1:31 ` John Hubbard
2026-03-05 7:07 ` Alexandre Courbot
2026-03-05 12:28 ` Gary Guo
2026-03-05 12:36 ` Danilo Krummrich
2026-03-05 12:59 ` Gary Guo
2026-03-05 13:59 ` Alexandre Courbot
2026-03-05 14:05 ` Gary Guo
2026-03-05 15:17 ` Alexandre Courbot
2026-02-23 11:23 ` Alice Ryhl
2026-02-21 2:09 ` [PATCH v5 22/38] gpu: nova-core: Hopper/Blackwell: calculate reserved FB heap size John Hubbard
2026-02-21 2:09 ` [PATCH v5 23/38] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication John Hubbard
2026-02-21 2:09 ` [PATCH v5 24/38] gpu: nova-core: Hopper/Blackwell: add FSP secure boot completion waiting John Hubbard
2026-02-21 2:09 ` [PATCH v5 25/38] gpu: nova-core: Hopper/Blackwell: add FSP message structures John Hubbard
2026-02-21 2:09 ` [PATCH v5 26/38] gpu: nova-core: Hopper/Blackwell: add FMC signature extraction John Hubbard
2026-02-21 2:09 ` John Hubbard [this message]
2026-02-21 2:09 ` [PATCH v5 28/38] gpu: nova-core: Hopper/Blackwell: add FspCotVersion type John Hubbard
2026-02-21 2:09 ` [PATCH v5 29/38] gpu: nova-core: Hopper/Blackwell: larger non-WPR heap John Hubbard
2026-02-21 2:09 ` [PATCH v5 30/38] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot John Hubbard
2026-02-21 2:09 ` [PATCH v5 31/38] gpu: nova-core: Blackwell: use correct sysmem flush registers John Hubbard
2026-02-21 2:09 ` [PATCH v5 32/38] gpu: nova-core: Hopper/Blackwell: larger WPR2 (GSP) heap John Hubbard
2026-02-21 2:09 ` [PATCH v5 33/38] gpu: nova-core: refactor SEC2 booter loading into BooterFirmware::run() John Hubbard
2026-02-21 2:09 ` [PATCH v5 34/38] gpu: nova-core: Hopper/Blackwell: add GSP lockdown release polling John Hubbard
2026-02-21 2:09 ` [PATCH v5 35/38] gpu: nova-core: Hopper/Blackwell: new location for PCI config mirror John Hubbard
2026-02-21 2:09 ` [PATCH v5 36/38] gpu: nova-core: Hopper/Blackwell: integrate FSP boot path into boot() John Hubbard
2026-02-21 2:09 ` [PATCH v5 37/38] rust: sizes: add u64 variants of SZ_* constants John Hubbard
2026-02-21 2:09 ` [PATCH v5 38/38] gpu: nova-core: use SZ_*_U64 constants from kernel::sizes John Hubbard
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