From: John Hubbard <jhubbard@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
Alexandre Courbot <acourbot@nvidia.com>
Cc: "Joel Fernandes" <joelagnelf@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Eliot Courtney" <ecourtney@nvidia.com>,
"Shashank Sharma" <shashanks@nvidia.com>,
"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
rust-for-linux@vger.kernel.org,
LKML <linux-kernel@vger.kernel.org>,
"John Hubbard" <jhubbard@nvidia.com>
Subject: [PATCH v8 21/31] gpu: nova-core: Hopper/Blackwell: add FSP send/receive messaging
Date: Tue, 24 Mar 2026 20:52:32 -0700 [thread overview]
Message-ID: <20260325035242.368661-22-jhubbard@nvidia.com> (raw)
In-Reply-To: <20260325035242.368661-1-jhubbard@nvidia.com>
Add send_sync_fsp() which sends an MCTP/NVDM message to FSP and waits
for the response. Response validation uses the typed MctpHeader and
NvdmHeader wrappers from the previous commit.
A MessageToFsp trait provides the NVDM type constant for each message
struct, so send_sync_fsp() can verify that the response matches the
request.
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
---
drivers/gpu/nova-core/falcon/fsp.rs | 3 -
drivers/gpu/nova-core/fsp.rs | 123 ++++++++++++++++++++++++++++
2 files changed, 123 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon/fsp.rs b/drivers/gpu/nova-core/falcon/fsp.rs
index faf923246ae9..1dcfd155b99c 100644
--- a/drivers/gpu/nova-core/falcon/fsp.rs
+++ b/drivers/gpu/nova-core/falcon/fsp.rs
@@ -150,7 +150,6 @@ pub(crate) fn read_emem(&self, bar: &Bar0, offset: u32, data: &mut [u8]) -> Resu
///
/// The FSP message queue is not circular - pointers are reset to 0 after each
/// message exchange, so `tail >= head` is always true when data is present.
- #[expect(unused)]
pub(crate) fn poll_msgq(&self, bar: &Bar0) -> u32 {
let head = regs::NV_PFSP_MSGQ_HEAD::read(bar).address();
let tail = regs::NV_PFSP_MSGQ_TAIL::read(bar).address();
@@ -173,7 +172,6 @@ pub(crate) fn poll_msgq(&self, bar: &Bar0) -> u32 {
///
/// # Returns
/// `Ok(())` on success, `Err(EINVAL)` if packet is empty or not 4-byte aligned
- #[expect(unused)]
pub(crate) fn send_msg(&self, bar: &Bar0, packet: &[u8]) -> Result {
if packet.is_empty() {
return Err(EINVAL);
@@ -205,7 +203,6 @@ pub(crate) fn send_msg(&self, bar: &Bar0, packet: &[u8]) -> Result {
///
/// # Returns
/// `Ok(bytes_read)` on success, `Err(EINVAL)` if size is 0, exceeds buffer, or not aligned
- #[expect(unused)]
pub(crate) fn recv_msg(&self, bar: &Bar0, buffer: &mut [u8], size: usize) -> Result<usize> {
if size == 0 || size > buffer.len() {
return Err(EINVAL);
diff --git a/drivers/gpu/nova-core/fsp.rs b/drivers/gpu/nova-core/fsp.rs
index a13d883373f0..4fb932f91da2 100644
--- a/drivers/gpu/nova-core/fsp.rs
+++ b/drivers/gpu/nova-core/fsp.rs
@@ -19,6 +19,15 @@
use crate::regs;
+use crate::mctp::{
+ MctpHeader,
+ NvdmHeader,
+ NvdmType, //
+};
+
+/// FSP message timeout in milliseconds.
+const FSP_MSG_TIMEOUT_MS: i64 = 2000;
+
/// FSP secure boot completion timeout in milliseconds.
const FSP_SECURE_BOOT_TIMEOUT_MS: i64 = 4000;
@@ -117,6 +126,37 @@ pub(crate) struct FmcSignatures {
public_key: [u8; FSP_PKEY_SIZE],
signature: [u8; FSP_SIG_SIZE],
}
+
+/// FSP Command Response payload structure.
+/// NVDM_PAYLOAD_COMMAND_RESPONSE structure.
+#[repr(C, packed)]
+#[derive(Clone, Copy)]
+struct NvdmPayloadCommandResponse {
+ task_id: u32,
+ command_nvdm_type: u32,
+ error_code: u32,
+}
+
+/// Complete FSP response structure with MCTP and NVDM headers.
+#[repr(C, packed)]
+#[derive(Clone, Copy)]
+struct FspResponse {
+ mctp_header: u32,
+ nvdm_header: u32,
+ response: NvdmPayloadCommandResponse,
+}
+
+// SAFETY: FspResponse is a packed C struct with only integral fields.
+unsafe impl FromBytes for FspResponse {}
+
+/// Trait implemented by types representing a message to send to FSP.
+///
+/// This provides [`Fsp::send_sync_fsp`] with the information it needs to send
+/// a given message, following the same pattern as GSP's `CommandToGsp`.
+pub(crate) trait MessageToFsp: AsBytes {
+ /// NVDM type identifying this message to FSP.
+ const NVDM_TYPE: u32;
+}
/// FSP interface for Hopper/Blackwell GPUs.
pub(crate) struct Fsp;
@@ -217,4 +257,87 @@ pub(crate) fn extract_fmc_signatures(
Ok(signatures)
}
+
+ /// Send message to FSP and wait for response.
+ #[expect(dead_code)]
+ fn send_sync_fsp<M>(
+ dev: &device::Device<device::Bound>,
+ bar: &crate::driver::Bar0,
+ fsp_falcon: &crate::falcon::Falcon<crate::falcon::fsp::Fsp>,
+ msg: &M,
+ ) -> Result
+ where
+ M: MessageToFsp,
+ {
+ fsp_falcon.send_msg(bar, msg.as_bytes())?;
+
+ let timeout = Delta::from_millis(FSP_MSG_TIMEOUT_MS);
+ let packet_size = read_poll_timeout(
+ || Ok(fsp_falcon.poll_msgq(bar)),
+ |&size| size > 0,
+ Delta::from_millis(10),
+ timeout,
+ )
+ .map_err(|_| {
+ dev_err!(dev, "FSP response timeout\n");
+ ETIMEDOUT
+ })?;
+
+ let packet_size = packet_size as usize;
+ let mut response_buf = KVec::<u8>::new();
+ response_buf.resize(packet_size, 0, GFP_KERNEL)?;
+ fsp_falcon.recv_msg(bar, &mut response_buf, packet_size)?;
+
+ if response_buf.len() < core::mem::size_of::<FspResponse>() {
+ dev_err!(dev, "FSP response too small: {}\n", response_buf.len());
+ return Err(EIO);
+ }
+
+ let response = FspResponse::from_bytes(&response_buf[..]).ok_or(EIO)?;
+
+ let mctp_header: MctpHeader = response.mctp_header.into();
+ let nvdm_header: NvdmHeader = response.nvdm_header.into();
+ let command_nvdm_type = response.response.command_nvdm_type;
+ let error_code = response.response.error_code;
+
+ if !mctp_header.is_single_packet() {
+ dev_err!(
+ dev,
+ "Unexpected MCTP header in FSP reply: {:#x}\n",
+ mctp_header.raw()
+ );
+ return Err(EIO);
+ }
+
+ if !nvdm_header.validate(NvdmType::FspResponse) {
+ dev_err!(
+ dev,
+ "Unexpected NVDM header in FSP reply: {:#x}\n",
+ nvdm_header.raw()
+ );
+ return Err(EIO);
+ }
+
+ if command_nvdm_type != M::NVDM_TYPE {
+ dev_err!(
+ dev,
+ "Expected NVDM type {:#x} in reply, got {:#x}\n",
+ M::NVDM_TYPE,
+ command_nvdm_type
+ );
+ return Err(EIO);
+ }
+
+ if error_code != 0 {
+ dev_err!(
+ dev,
+ "NVDM command {:#x} failed with error {:#x}\n",
+ M::NVDM_TYPE,
+ error_code
+ );
+ return Err(EIO);
+ }
+
+ Ok(())
+ }
}
--
2.53.0
next prev parent reply other threads:[~2026-03-25 3:53 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-25 3:52 [PATCH v8 00/31] gpu: nova-core: firmware: Hopper/Blackwell support John Hubbard
2026-03-25 3:52 ` [PATCH v8 01/31] gpu: nova-core: Hopper/Blackwell: basic GPU identification John Hubbard
2026-03-25 15:36 ` Gary Guo
2026-03-25 21:34 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 02/31] gpu: nova-core: factor .fwsignature* selection into a new find_gsp_sigs_section() John Hubbard
2026-03-25 10:45 ` Alexandre Courbot
2026-03-25 21:56 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 03/31] gpu: nova-core: use GPU Architecture to simplify HAL selections John Hubbard
2026-03-25 3:52 ` [PATCH v8 04/31] gpu: nova-core: add Copy/Clone to Spec and Revision, add chipset() accessor John Hubbard
2026-03-25 10:47 ` Alexandre Courbot
2026-03-26 1:21 ` John Hubbard
2026-03-25 15:42 ` Gary Guo
2026-03-26 1:21 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 05/31] gpu: nova-core: set DMA mask width based on GPU architecture John Hubbard
2026-03-25 10:53 ` Alexandre Courbot
2026-03-26 1:22 ` John Hubbard
2026-03-25 11:31 ` Danilo Krummrich
2026-03-25 11:45 ` Alexandre Courbot
2026-03-25 13:38 ` Danilo Krummrich
2026-03-25 13:56 ` Alexandre Courbot
2026-03-26 1:22 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 06/31] gpu: nova-core: Hopper/Blackwell: skip GFW boot waiting John Hubbard
2026-03-25 10:53 ` Alexandre Courbot
2026-03-26 1:22 ` John Hubbard
2026-03-25 15:45 ` Gary Guo
2026-03-26 1:23 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 07/31] gpu: nova-core: move firmware image parsing code to firmware.rs John Hubbard
2026-03-25 3:52 ` [PATCH v8 08/31] gpu: nova-core: factor out an elf_str() function John Hubbard
2026-03-25 3:52 ` [PATCH v8 09/31] gpu: nova-core: don't assume 64-bit firmware images John Hubbard
2026-03-25 3:52 ` [PATCH v8 10/31] gpu: nova-core: add support for 32-bit " John Hubbard
2026-03-25 3:52 ` [PATCH v8 11/31] gpu: nova-core: add auto-detection of 32-bit, 64-bit " John Hubbard
2026-03-25 3:52 ` [PATCH v8 12/31] gpu: nova-core: Hopper/Blackwell: add FMC firmware image, in support of FSP John Hubbard
2026-03-25 15:52 ` Gary Guo
2026-03-26 1:23 ` John Hubbard
2026-03-25 3:52 ` [PATCH v8 13/31] gpu: nova-core: Hopper/Blackwell: add FSP falcon engine stub John Hubbard
2026-03-25 3:52 ` [PATCH v8 14/31] gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operations John Hubbard
2026-03-25 3:52 ` [PATCH v8 15/31] gpu: nova-core: Hopper/Blackwell: add FSP message infrastructure John Hubbard
2026-03-25 3:52 ` [PATCH v8 16/31] rust: ptr: add const_align_up() John Hubbard
2026-03-25 8:22 ` Alice Ryhl
2026-03-25 15:52 ` Gary Guo
2026-03-25 3:52 ` [PATCH v8 17/31] gpu: nova-core: Hopper/Blackwell: calculate reserved FB heap size John Hubbard
2026-03-25 3:52 ` [PATCH v8 18/31] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication John Hubbard
2026-03-25 3:52 ` [PATCH v8 19/31] gpu: nova-core: Hopper/Blackwell: add FSP secure boot completion waiting John Hubbard
2026-03-25 3:52 ` [PATCH v8 20/31] gpu: nova-core: Hopper/Blackwell: add FMC signature extraction John Hubbard
2026-03-25 3:52 ` John Hubbard [this message]
2026-03-25 3:52 ` [PATCH v8 22/31] gpu: nova-core: Hopper/Blackwell: add FspCotVersion type John Hubbard
2026-03-25 3:52 ` [PATCH v8 23/31] gpu: nova-core: Hopper/Blackwell: larger non-WPR heap John Hubbard
2026-03-25 3:52 ` [PATCH v8 24/31] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot John Hubbard
2026-03-25 3:52 ` [PATCH v8 25/31] gpu: nova-core: Blackwell: use correct sysmem flush registers John Hubbard
2026-03-25 3:52 ` [PATCH v8 26/31] gpu: nova-core: make WPR heap sizing fallible John Hubbard
2026-03-25 3:52 ` [PATCH v8 27/31] gpu: nova-core: Hopper/Blackwell: larger WPR2 (GSP) heap John Hubbard
2026-03-25 3:52 ` [PATCH v8 28/31] gpu: nova-core: refactor SEC2 booter loading into BooterFirmware::run() John Hubbard
2026-03-25 3:52 ` [PATCH v8 29/31] gpu: nova-core: Hopper/Blackwell: add GSP lockdown release polling John Hubbard
2026-03-25 3:52 ` [PATCH v8 30/31] gpu: nova-core: Hopper/Blackwell: new location for PCI config mirror John Hubbard
2026-03-25 3:52 ` [PATCH v8 31/31] gpu: nova-core: Hopper/Blackwell: integrate FSP boot path into boot() John Hubbard
2026-03-25 15:08 ` [PATCH v8 00/31] gpu: nova-core: firmware: Hopper/Blackwell support Danilo Krummrich
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