From: Laura Nao <laura.nao@collabora.com>
To: linkmauve@linkmauve.fr
Cc: a.hindborg@kernel.org, acourbot@nvidia.com, airlied@gmail.com,
aliceryhl@google.com, bjorn3_gh@protonmail.com, boqun@kernel.org,
dakr@kernel.org, daniel.almeida@collabora.com,
deborah.brouwer@collabora.com, dri-devel@lists.freedesktop.org,
gary@garyguo.net, kernel@collabora.com, laura.nao@collabora.com,
linux-kernel@vger.kernel.org, lossin@kernel.org,
ojeda@kernel.org, rust-for-linux@vger.kernel.org,
simona@ffwll.ch, tamird@kernel.org, tmgross@umich.edu,
work@onurozkan.dev
Subject: Re: [PATCH v3] drm/tyr: add Job IRQ handling
Date: Wed, 5 Aug 2026 12:48:15 +0200 [thread overview]
Message-ID: <20260805104815.104154-1-laura.nao@collabora.com> (raw)
In-Reply-To: <anHZpHh_5CZhH5N3@desktop>
Hello,
On 8/4/26 14:23, Link Mauve wrote:
> Hi,
>
> On Mon, Aug 03, 2026 at 03:34:37PM +0200, Laura Nao wrote:
>> Add a threaded IRQ wrapper for Tyr interrupt sources and use it to
>> handle the firmware Job IRQ.
>>
>> The Job IRQ reports requests from the CSF firmware, including global
>> interface requests and CSG attention bits. Only the GLB bit is currently
>> handled, as it will be used to check firmware readiness. CSG bits
>> handling will be added at a later stage. Add a Job IRQ handler that
>> masks the interrupt in the primary IRQ handler, processes pending raw
>> status in the threaded handler, clears the handled bit, and reenables
>> the mask before returning.
>> Add a wait queue and a bool flag so the handler can signal firmware
>> readiness when the GLB bit is set.
> […]
>> diff --git a/drivers/gpu/drm/tyr/fw/irq.rs b/drivers/gpu/drm/tyr/fw/irq.rs
>> new file mode 100644
>> index 000000000000..6eeb1399a7b3
>> --- /dev/null
>> +++ b/drivers/gpu/drm/tyr/fw/irq.rs
>> @@ -0,0 +1,105 @@
> […]
>> +/// Requests a threaded IRQ registration for the Job IRQ.
>> +///
>> +/// # Safety
>> +///
>> +/// Callers must not `mem::forget()` the resulting registration or otherwise prevent its
>> +/// [`Drop`] implementation from running.
>> +pub(crate) unsafe fn job_irq_init<'a>(
>> + pdev: &'a platform::Device<Bound>,
>> + iomem: Arc<IoMem<'a>>,
>> + fw_ready: Arc<AtomicBool>,
>> + job_irq_wait: Arc<WaitQueue>,
>> +) -> Result<impl PinInit<ThreadedRegistration<'a, TyrIrq<JobIrq<'a>>>, Error> + 'a> {
>> + iomem.write_reg(JOB_IRQ_MASK::zeroed().with_glb(true));
>> + let job_irq = JobIrq {
>> + iomem: iomem.clone(),
>> + fw_ready,
>> + job_irq_wait,
>> + };
>> + // SAFETY: The caller guarantees the resulting registration will not be leaked.
>> + unsafe { TyrIrq::request(pdev, c_str!("job"), job_irq) }
>
> Nowadays we use the shorter c"job" way of creating a &CStr, and I think
> the macro will even generate warnings in some configurations (perhaps
> CLIPPY=1?).
>
Got it, I didn't get the warning with CLIPPY=1, I'll double check my
configuration.
I'll fix this in the next revision. Thanks for the heads up!
Best,
Laura
next prev parent reply other threads:[~2026-08-05 10:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 13:34 [PATCH v3] drm/tyr: add Job IRQ handling Laura Nao
2026-08-04 12:23 ` Link Mauve
2026-08-05 10:48 ` Laura Nao [this message]
2026-08-06 8:27 ` Alice Ryhl
2026-08-06 12:09 ` Gary Guo
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