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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: peeAUf0NF8lNpCaYiI8B0vktsxs1zq0p4EMAqZlOhcZcOL673qhL0UxOunseviqkgAAWdkdV80zrDcgw/IoVuumyNTmwlZlw/bZb6PnJ4GxYK9zfee/jB19f8z6nfuG4Kl9frTc0baVgS1P9juLuFJ+8sUI0KmkJb4/ungv+lqlpcYGNyhc41dt8nz93RGGmOJPTAOWuflumWJwGW5ipFZh8/9jRYCvKzXu8R5pZXDFs0jwrlAD5Mz3zlBjehuQha2nyxR6QH8AiqBhw3hMYSIxkKp1qgDbA+96vh+K+kzzvFJjzD2NIlNN6CYcoTJTIvoPq0nY/JqyRWk/oLGggAUH6TTj6qnUmuBYXQCfqNoPN8zgmtu/Qp/ADVGP+kInE1Jm9ArFQvjKW4E/PhloWZ0cr4EJlyeyXGZy4cEUTPdLnas1GMlrv4tSp9a93xehS X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Oct 2026 17:13:11.4479 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d84ac46c-8c3f-46a7-30a0-08df36a9138f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00006E21.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS8PR12MB315725 From: Peter Colberg Wrap pci_enable_sriov() and pci_disable_sriov() on Device for use by the SR-IOV callback tokens and their rollback guard. Keep these operations internal so drivers can only enable or disable VFs through the callback-scoped API introduced later in this series. Suggested-by: Danilo Krummrich Signed-off-by: Peter Colberg Signed-off-by: Zhi Wang Signed-off-by: Simon Song --- rust/kernel/pci.rs | 2 ++ rust/kernel/pci/iov.rs | 48 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 rust/kernel/pci/iov.rs diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index f47974d3e76..e522fdddc34 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -36,6 +36,8 @@ mod cap; mod id; mod io; +#[cfg(CONFIG_PCI_IOV)] +mod iov; mod irq; pub use self::cap::{ diff --git a/rust/kernel/pci/iov.rs b/rust/kernel/pci/iov.rs new file mode 100644 index 00000000000..6f8f95ed618 --- /dev/null +++ b/rust/kernel/pci/iov.rs @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Abstractions for PCI Single Root I/O Virtualization (SR-IOV) drivers. + +use super::Device; + +use crate::{ + bindings, + device, + error::to_result, + prelude::*, // +}; + +impl Device> { + /// Enable the Single Root I/O Virtualization (SR-IOV) capability for this device, + /// where `nr_virtfn` is number of Virtual Functions (VF) to enable. + #[inline] + #[expect(dead_code)] + pub(crate) fn enable_sriov(&self, nr_virtfn: u16) -> Result { + // SAFETY: + // - `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // - `pci_enable_sriov()` checks that the enable operation is valid: + // - the device is a Physical Function (PF), + // - SR-IOV is currently disabled, and + // - `nr_virtfn` does not exceed the total number of supported VFs. + // + // - The [`CoreInternal`] device context inherits from the [`Bound`] device context, + // which guarantees that the PF device is bound to a driver. + to_result(unsafe { bindings::pci_enable_sriov(self.as_raw(), nr_virtfn.into()) }) + } + + /// Disable the Single Root I/O Virtualization (SR-IOV) capability for this device. + #[inline] + #[expect(dead_code)] + pub(crate) fn disable_sriov(&self) { + // SAFETY: + // - `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // - `pci_disable_sriov()` checks that the disable operation is valid: + // - the device is a Physical Function (PF), and + // - SR-IOV is currently enabled. + // + // - The [`CoreInternal`] device context inherits from the [`Bound`] device context, + // which guarantees that the PF device is bound to a driver. + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; + } +} -- 2.43.7