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[2003:df:bf2f:2200:b91b:c640:bc7f:cabd]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a991028581esm103749966b.37.2024.10.03.09.18.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 03 Oct 2024 09:18:36 -0700 (PDT) Message-ID: <4f051c35-fb45-4f91-8daf-6ba53c8d4ab9@gmail.com> Date: Thu, 3 Oct 2024 18:18:35 +0200 Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 00/14] hrtimer Rust API To: Boqun Feng Cc: Dirk Behme , Andreas Hindborg , Miguel Ojeda , Alex Gaynor , Anna-Maria Behnsen , Frederic Weisbecker , Thomas Gleixner , Gary Guo , =?UTF-8?Q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Alice Ryhl , rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240917222739.1298275-1-a.hindborg@kernel.org> Content-Language: en-US From: Dirk Behme In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Am 03.10.24 um 15:03 schrieb Boqun Feng: > On Thu, Oct 03, 2024 at 10:14:17AM +0200, Dirk Behme wrote: >> Am 01.10.24 um 16:42 schrieb Boqun Feng: >>> On Tue, Oct 01, 2024 at 02:37:46PM +0200, Dirk Behme wrote: >>>> On 18.09.2024 00:27, Andreas Hindborg wrote: >>>>> Hi! >>>>> >>>>> This series adds support for using the `hrtimer` subsystem from Rust code. >>>>> >>>>> I tried breaking up the code in some smaller patches, hopefully that will >>>>> ease the review process a bit. >>>> >>>> Just fyi, having all 14 patches applied I get [1] on the first (doctest) >>>> Example from hrtimer.rs. >>>> >>>> This is from lockdep: >>>> >>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/kernel/locking/lockdep.c#n4785 >>>> >>>> Having just a quick look I'm not sure what the root cause is. Maybe mutex in >>>> interrupt context? Or a more subtle one? >>> >>> I think it's calling mutex inside an interrupt context as shown by the >>> callstack: >>> >>> ] __mutex_lock+0xa0/0xa4 >>> ] ... >>> ] hrtimer_interrupt+0x1d4/0x2ac >>> >>> , it is because: >>> >>> +//! struct ArcIntrusiveTimer { >>> +//! #[pin] >>> +//! timer: Timer, >>> +//! #[pin] >>> +//! flag: Mutex, >>> +//! #[pin] >>> +//! cond: CondVar, >>> +//! } >>> >>> has a Mutex, which actually should be a SpinLockIrq [1]. >> >> >> Two understanding questions: >> > > Good questions. ;-) :-) >> 1. In the main thread (full example for reference below [2]) where is the >> lock released? After the while loop? I.e. is the lock held until guard > > With the current implementation, there are two places the lock will be > released: 1) inside CondVar::wait() and CondVar::wait() releases *and* reaquires, the lock then? So that outside of CondVar::wait() but inside the while() loop the lock is held until the while loop is exit? Would that lock handling inside CondVar::wait() handle the irq stuff (irq enable and disable) of SpinLockIrq correctly, then? > 2) after `guard` is eventually > drop after the loop. > >> reaches 5? >> >> let mut guard = has_timer.flag.lock(); // <= lock taken here? >> >> while *guard != 5 { >> has_timer.cond.wait(&mut guard); >> } // <= lock >> released here? >> >> I wonder what this would mean for the interrupt TimerCallback in case we >> would use an irq-off SpinLock instead here? >> >> Or maybe: >> >> 2. The only place where the guard is modified (*guard += 1;) is in the >> TimerCallback which runs in interrupt context as we learned. With that >> writing the guard value can't be interrupted. Couldn't we drop the whole >> lock, then? >> > > No, because the main thread can run on another CPU, so disabling > interrupts (because of the interrupt handlers) doesn't mean exclusive > access to value. Yes. I agree if the main thread would write. But that main thread does read-only accesses, only? So it reads either the old or the new value, indepenent on the locking? Only the interrupt handler does read/modify/write. But thats protected by the interrupt context, already. Dirk >> Best regards >> >> Dirk >> >> >> [2] >> >> //! #[pin_data] >> //! struct ArcIntrusiveTimer { >> //! #[pin] >> //! timer: Timer, >> //! #[pin] >> //! flag: Mutex, >> //! #[pin] >> //! cond: CondVar, >> //! } >> //! >> //! impl ArcIntrusiveTimer { >> //! fn new() -> impl PinInit { >> //! try_pin_init!(Self { >> //! timer <- Timer::new(), >> //! flag <- new_mutex!(0), >> //! cond <- new_condvar!(), >> //! }) >> //! } >> //! } >> //! >> //! impl TimerCallback for ArcIntrusiveTimer { >> //! type CallbackTarget<'a> = Arc; >> //! type CallbackPointer<'a> = Arc; >> //! >> //! fn run(this: Self::CallbackTarget<'_>) -> TimerRestart { >> //! pr_info!("Timer called\n"); >> //! let mut guard = this.flag.lock(); >> //! *guard += 1; >> //! this.cond.notify_all(); >> //! if *guard == 5 { >> //! TimerRestart::NoRestart >> //! } >> //! else { >> //! TimerRestart::Restart >> //! >> //! } >> //! } >> //! } >> //! >> //! impl_has_timer! { >> //! impl HasTimer for ArcIntrusiveTimer { self.timer } >> //! } >> //! >> //! >> //! let has_timer = Arc::pin_init(ArcIntrusiveTimer::new(), GFP_KERNEL)?; >> //! let _handle = has_timer.clone().schedule(Ktime::from_ns(200_000_000)); >> //! let mut guard = has_timer.flag.lock(); >> //! >> //! while *guard != 5 { >> //! has_timer.cond.wait(&mut guard); >> //! } >> //! >> //! pr_info!("Counted to 5\n"); >> //! # Ok::<(), kernel::error::Error>(()) >> >> >> > [...]