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From: Timur Tabi <ttabi@nvidia.com>
To: Joel Fernandes <joelagnelf@nvidia.com>
Cc: "nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>,
	Alexandre Courbot <acourbot@nvidia.com>,
	"dakr@kernel.org" <dakr@kernel.org>,
	"lyude@redhat.com" <lyude@redhat.com>,
	John Hubbard <jhubbard@nvidia.com>,
	"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>
Subject: Re: [PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100
Date: Tue, 18 Nov 2025 00:52:47 +0000	[thread overview]
Message-ID: <57b542d736e22d1bce7143b789e0760c9380aaa3.camel@nvidia.com> (raw)
In-Reply-To: <20251117223324.GA1094429@joelbox2>

On Mon, 2025-11-17 at 17:33 -0500, Joel Fernandes wrote:
> >  
> > +        // There are two versions of Booter, one for Turing/GA100, and another for
> > +        // GA102+.  The extraction of the IMEM sections differs between the two
> > +        // versions.  Unfortunately, the file names are the same, and the headers
> > +        // don't indicate the versions.  The only way to differentiate is by the Chipset.
> 
> Some more doc comments and documentation explaining the header structure
> would be great.

The header structure is the same, it's just that on pre-GA102 platforms, some header fields are
used, and on GA102+ platforms other header fields are used.  I can't explain why -- that's just how
the images were built.

I'm not sure what kind of documentation I could add.  The headers are already all documented, and it
just seems somewhat arbitrary how the fields are used.

> > +
> >          Ok(Self {
> > -            imem_sec_load_target: FalconLoadTarget {
> > -                src_start: app0.offset,
> > -                dst_start: 0,
> > -                len: app0.len,
> > +            imem_sec_load_target: if chipset > Chipset::GA100 {
> > +                FalconLoadTarget {
> > +                    src_start: app0.offset,
> > +                    dst_start: 0,
> > +                    len: app0.len,
> > +                }
> > +            } else {
> > +                FalconLoadTarget {
> > +                    src_start: load_hdr.os_code_size,
> > +                    dst_start: app0.offset,
> > +                    len: app0.len,
> > +                }
> 
> Can write more succinctly:
> 
>   imem_sec_load_target: FalconLoadTarget {
>       src_start: match chipset > Chipset::GA100  {
>           true => app0.offset,
>           false => load_hdr.os_code_size,
>       },
>       dst_start: match chipset > Chipset::GA100 {
>           true => 0,
>           false => app0.offset,
>       
>       len: app0.len,                                                                            
>   },

Do we really want to use "match" instead of "if", just because we don't need "else"?

> 
> > +            },
> > +            imem_ns_load_target: if chipset > Chipset::GA100 {
> > +                None
> > +            } else {
> > +                Some(FalconLoadTarget {
> > +                    src_start: 0,
> > +                    dst_start: load_hdr.os_code_offset,
> > +                    len: load_hdr.os_code_size,
> > +                })
> >              },
> > -            // Exists only in the booter image for Turing and GA100
> > -            imem_ns_load_target: None,
> >              dmem_load_target: FalconLoadTarget {
> >                  src_start: load_hdr.os_data_offset,
> >                  dst_start: 0,
> > @@ -393,7 +413,13 @@ fn brom_params(&self) -> FalconBromParams {
> >      }
> >  
> >      fn boot_addr(&self) -> u32 {
> > -        self.imem_sec_load_target.src_start
> > +        if let Some(ns_target) = &self.imem_ns_load_target {
> > +            // Turing and GA100 - use non-secure load target
> > +            ns_target.dst_start
> > +        } else {
> > +            // GA102+ (Ampere) - use secure load target
> 
> s/Ampere/Ampere and later/ ? Also missing period at end of comment, here and
> elsewhere.

Sure, I'll clean those up.  I'll just remove the (Ampere) though.

Please keep in mind that I've been working on these patches on-and-off over several weeks and
through multiple rebases.  There will be a lot of nits.


  reply	other threads:[~2025-11-18  0:52 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-14 23:30 [PATCH 00/11] gpu: nova-core: add Turing support Timur Tabi
2025-11-14 23:30 ` [PATCH 01/11] gpu: nova-core: rename Imem to ImemSec Timur Tabi
2025-11-17 22:50   ` Lyude Paul
2025-11-14 23:30 ` [PATCH 02/11] gpu: nova-core: add ImemNs section infrastructure Timur Tabi
2025-11-17 23:19   ` Lyude Paul
2025-11-19  1:54   ` Alexandre Courbot
2025-11-19  6:30     ` John Hubbard
2025-11-19  6:55       ` Alexandre Courbot
2025-11-19 19:54         ` Timur Tabi
2025-11-19 20:34           ` Joel Fernandes
2025-11-19 20:45             ` Timur Tabi
2025-11-19 20:54               ` John Hubbard
2025-11-19 20:56                 ` Timur Tabi
2025-11-20  1:45           ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-11-17 22:33   ` Joel Fernandes
2025-11-18  0:52     ` Timur Tabi [this message]
2025-11-18  1:04       ` Joel Fernandes
2025-11-18  1:06         ` Timur Tabi
2025-11-18  1:15           ` John Hubbard
2025-11-18  1:29             ` John Hubbard
2025-11-18  1:12         ` John Hubbard
2025-11-18 19:42           ` Joel Fernandes
2025-11-19  2:51   ` Alexandre Courbot
2025-11-19  5:16     ` Timur Tabi
2025-11-19  7:03       ` Alexandre Courbot
2025-11-19  7:04       ` John Hubbard
2025-11-19 20:10         ` Joel Fernandes
2025-11-14 23:30 ` [PATCH 04/11] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-11-17 23:20   ` Lyude Paul
2025-11-19  2:59   ` Alexandre Courbot
2025-11-19  5:17     ` Timur Tabi
2025-11-19  7:11     ` Alexandre Courbot
2025-11-19  7:17       ` John Hubbard
2025-11-19  7:34         ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 05/11] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-11-19  3:04   ` Alexandre Courbot
2025-11-19  6:32     ` John Hubbard
2025-11-14 23:30 ` [PATCH 06/11] gpu: nova-core: add Turing boot registers Timur Tabi
2025-11-17 22:41   ` Joel Fernandes
2025-11-19  2:17   ` Alexandre Courbot
2025-11-19  6:34     ` John Hubbard
2025-11-19  6:47       ` Alexandre Courbot
2025-11-19  6:51         ` John Hubbard
2025-11-19  7:15           ` Alexandre Courbot
2025-11-19  7:24             ` John Hubbard
2025-11-19 19:10               ` Timur Tabi
2025-11-20  1:41                 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 07/11] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-11-14 23:30 ` [PATCH 08/11] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-11-18  0:50   ` Joel Fernandes
2025-11-19  3:11   ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 09/11] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-11-17 23:10   ` Joel Fernandes
2025-11-18 13:04     ` Alexandre Courbot
2025-11-18 15:08       ` Timur Tabi
2025-11-18 19:46         ` Joel Fernandes
2025-11-19  1:36         ` Alexandre Courbot
2025-11-18 19:45       ` Joel Fernandes
2025-11-19  6:40         ` John Hubbard
2025-11-19  3:27   ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 10/11] gpu: nova-core: LibosMemoryRegionInitArgument size must be page aligned Timur Tabi
2025-11-19  3:36   ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 11/11] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-11-17 23:34   ` Joel Fernandes
2025-11-18 13:08     ` Alexandre Courbot
2025-11-19  4:28   ` Alexandre Courbot
2025-11-19 13:49     ` Alexandre Courbot
2025-11-19  7:01   ` Alexandre Courbot
2025-11-19  4:29 ` [PATCH 00/11] gpu: nova-core: add Turing support Alexandre Courbot

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