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From: Benno Lossin <benno.lossin@proton.me>
To: FUJITA Tomonori <fujita.tomonori@gmail.com>, andrew@lunn.ch
Cc: netdev@vger.kernel.org, rust-for-linux@vger.kernel.org,
	miguel.ojeda.sandonis@gmail.com, tmgross@umich.edu,
	boqun.feng@gmail.com, wedsonaf@gmail.com, greg@kroah.com
Subject: Re: [PATCH net-next v5 1/5] rust: core abstractions for network PHY drivers
Date: Thu, 19 Oct 2023 13:57:39 +0000	[thread overview]
Message-ID: <64748f96-ac67-492b-89c7-aea859f1d419@proton.me> (raw)
In-Reply-To: <20231019.094147.1808345526469629486.fujita.tomonori@gmail.com>

On 19.10.23 02:41, FUJITA Tomonori wrote:
> On Wed, 18 Oct 2023 22:27:55 +0200
> Andrew Lunn <andrew@lunn.ch> wrote:
> 
>>> +    /// Reads a given C22 PHY register.
>>> +    pub fn read(&mut self, regnum: u16) -> Result<u16> {
>>> +        let phydev = self.0.get();
>>> +        // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Self`.
>>> +        // So an FFI call with a valid pointer.
>>> +        let ret = unsafe {
>>> +            bindings::mdiobus_read((*phydev).mdio.bus, (*phydev).mdio.addr, regnum.into())
>>
>> If i've understood the discussion about &mut, it is not needed here,
>> and for write. Performing a read/write does not change anything in
>> phydev. There was mention of statistics, but they are in the mii_bus
>> structure, which is pointed to by this structure, but is not part of
>> this structure.
> 
> If I understand correctly, he said that either (&self or &mut self) is
> fine for read().
> 
> https://lore.kernel.org/netdev/3469de1c-0e6f-4fe5-9d93-2542f87ffd0d@proton.me/
> 
> Since `&mut self` is unique, only one thread per instance of `Self`
> can call that function. So use this when the C side would use a lock.
> (or requires that only one thread calls that code)
> 
> Since multiple `&self` references are allowed to coexist, you should
> use this for functions which perform their own serialization/do not
> require serialization.
> 
> 
> I applied the first case here.

I will try to explain things a bit more.

So this case is a bit difficult to figure out, because what is
going on is not really a pattern that is used in Rust.
We already have exclusive access to the `phy_device`, so in Rust
you would not need to lock anything to also have exclusive access to the
embedded `mii_bus`. In this sense, mutable references (`&mut T`) are
infectious.

Since C always locks the `mdio_lock` when we call the read & write
functions, we however could also just use a shared reference (`&T`)
for the function receiver, since the C side guarantees serialization.

Another reason for choosing `&mut self` here is the following: it is
easier to later change to `&self` compared to going with `&self` now
and changing to `&mut self` later. This is because if you have a `&mut T`
you can also call all of its `&T` functions, but not the other way around.
`&mut self` is as a receiver also more conservative, since it is more
strict as to where it can be called. So let's just go with that.

-- 
Cheers,
Benno



  reply	other threads:[~2023-10-19 13:57 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-17 11:30 [PATCH net-next v5 0/5] Rust abstractions for network PHY drivers FUJITA Tomonori
2023-10-17 11:30 ` [PATCH net-next v5 1/5] rust: core " FUJITA Tomonori
2023-10-18 15:07   ` Benno Lossin
2023-10-19  0:24     ` FUJITA Tomonori
2023-10-19 13:45       ` Benno Lossin
2023-10-19 14:42         ` FUJITA Tomonori
2023-10-19 15:20           ` Benno Lossin
2023-10-19 15:32             ` FUJITA Tomonori
2023-10-19 16:37               ` Benno Lossin
2023-10-19 21:51                 ` FUJITA Tomonori
2023-10-21  7:21                   ` Benno Lossin
2023-10-20  0:34             ` FUJITA Tomonori
2023-10-20 12:54               ` FUJITA Tomonori
2023-10-21  7:25                 ` Benno Lossin
2023-10-21  7:30                   ` FUJITA Tomonori
2023-10-21  8:37                     ` Benno Lossin
2023-10-21 10:27                       ` FUJITA Tomonori
2023-10-21 11:21                         ` Benno Lossin
2023-10-21 11:36                           ` FUJITA Tomonori
2023-10-21 12:13                             ` Benno Lossin
2023-10-21 12:38                               ` FUJITA Tomonori
2023-10-21 12:50                                 ` Benno Lossin
2023-10-21 13:00                                   ` FUJITA Tomonori
2023-10-21 13:05                                     ` Benno Lossin
2023-10-21 13:31                                       ` FUJITA Tomonori
2023-10-21 13:35                                         ` Benno Lossin
2023-10-21 21:45                                           ` FUJITA Tomonori
2023-10-23  6:35                                             ` Benno Lossin
2023-10-23  6:37                                               ` Benno Lossin
2023-10-21 15:57                                       ` Andrew Lunn
2023-10-21 16:31                                         ` Benno Lossin
2023-10-21 15:41                             ` Andrew Lunn
2023-10-20 18:42     ` Andrew Lunn
2023-10-21  4:44       ` FUJITA Tomonori
2023-10-21  7:36       ` Benno Lossin
2023-10-21 12:47       ` Miguel Ojeda
2023-10-22  9:47         ` FUJITA Tomonori
2023-10-22 11:37           ` Miguel Ojeda
2023-10-22 15:34             ` Andrew Lunn
2023-10-24  1:37               ` FUJITA Tomonori
2023-10-24  8:48               ` Miguel Ojeda
2023-10-18 20:27   ` Andrew Lunn
2023-10-19  0:41     ` FUJITA Tomonori
2023-10-19 13:57       ` Benno Lossin [this message]
2023-10-20 19:50         ` Andrew Lunn
2023-10-21  8:01           ` Benno Lossin
2023-10-21 15:35             ` Andrew Lunn
2023-10-20 17:26   ` Andreas Hindborg (Samsung)
2023-10-20 17:56     ` Benno Lossin
2023-10-20 19:59     ` Andrew Lunn
2023-10-20 20:30       ` Andreas Hindborg (Samsung)
2023-10-21  3:49         ` FUJITA Tomonori
2023-10-21  4:01     ` FUJITA Tomonori
2023-10-17 11:30 ` [PATCH net-next v5 2/5] rust: net::phy add module_phy_driver macro FUJITA Tomonori
2023-10-17 11:30 ` [PATCH net-next v5 3/5] WIP rust: add second `bindgen` pass for enum exhaustiveness checking FUJITA Tomonori
2023-10-20 11:37   ` Andreas Hindborg (Samsung)
2023-10-20 12:34     ` Miguel Ojeda
2023-10-20 12:35       ` Miguel Ojeda
2023-10-23  8:57       ` Andreas Hindborg (Samsung)
2023-10-21  3:51     ` FUJITA Tomonori
2023-10-21 12:05       ` Miguel Ojeda
2023-10-22  6:30         ` FUJITA Tomonori
2023-10-23  8:58         ` Andreas Hindborg (Samsung)
2023-10-17 11:30 ` [PATCH net-next v5 4/5] MAINTAINERS: add Rust PHY abstractions for ETHERNET PHY LIBRARY FUJITA Tomonori
2023-10-17 11:30 ` [PATCH net-next v5 5/5] net: phy: add Rust Asix PHY driver FUJITA Tomonori

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