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From: Zong Li <zong.li@sifive.com>
To: Deepak Gupta <debug@rivosinc.com>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
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Subject: Re: [PATCH v17 15/27] riscv/traps: Introduce software check exception and uprobe handling
Date: Wed, 16 Jul 2025 10:06:28 +0800	[thread overview]
Message-ID: <CANXhq0oZz=TTT=py=1BO3OZf45Wg=-bFyNpn+JRLNufHceLjcQ@mail.gmail.com> (raw)
In-Reply-To: <CAKC1njRNkSfb_0pUQoH0RwJQhWTsz9sdg_3o08w-NuSO5WypcA@mail.gmail.com>

On Wed, Jul 16, 2025 at 5:34 AM Deepak Gupta <debug@rivosinc.com> wrote:
>
> Hi Zong,
>
>
> On Thu, Jun 19, 2025 at 7:16 PM Zong Li <zong.li@sifive.com> wrote:
> >
> > On Mon, Jun 16, 2025 at 3:31 PM Zong Li <zong.li@sifive.com> wrote:
> > >
> > > On Thu, Jun 5, 2025 at 1:17 AM Deepak Gupta <debug@rivosinc.com> wrote:
> > > >
> > > > zicfiss / zicfilp introduces a new exception to priv isa `software check
> > > > exception` with cause code = 18. This patch implements software check
> > > > exception.
> > > >
> .....
>
> > > When a user mode CFI violation occurs, the ELP state should be 1, and
> > > the system traps into supervisor mode. During this trap, sstatus.SPELP
> > > is set to 1, and the ELP state is reset to 0. If we don’t clear
> > > sstatus.SPELP, the ELP state will become 1 again after executing the
> > > sret instruction. As a result, the system might trigger another
> > > forward CFI violation upon executing the next instruction in the user
> > > program, unless it happens to be a lpad instruction.
> > >
> > > The previous patch was tested on QEMU, but QEMU does not set the
> > > sstatus.SPELP bit to 1 when a forward CFI violation occurs. Therefore,
> > > I suspect that QEMU might also require some fixes.
> >
> > Hi Deepak,
> > The issue with QEMU was that the sw-check exception bit in medeleg
> > couldn't be set. This has been fixed in the latest QEMU mainline. I
> > have re-tested the latest QEMU version, and it works.
>
> What was this issue, can you point me to the patch in mainline?

Hi Deepak
The issue was that my QEMU setup somehow missed the change of
`target/riscv/csr.c` in your following patch:
https://github.com/qemu/qemu/commit/6031102401ae8a69a87b20fbec2aae666625d96a
After I upgraded to the latest QEMU source, I found the kernel issue
if we didn't clear sstatus.SPELP in the handler
Thanks

>
> >
> > >
> > > Thanks
> > >
> > > > +
> > > > +       if (is_fcfi || is_bcfi) {
> > > > +               do_trap_error(regs, SIGSEGV, SEGV_CPERR, regs->epc,
> > > > +                             "Oops - control flow violation");
> > > > +               return true;
> > > > +       }
> > > > +
> > > > +       return false;
> > > > +}
> > > > +
> > > > +/*
> > > > + * software check exception is defined with risc-v cfi spec. Software check
> > > > + * exception is raised when:-
> > > > + * a) An indirect branch doesn't land on 4 byte aligned PC or `lpad`
> > > > + *    instruction or `label` value programmed in `lpad` instr doesn't
> > > > + *    match with value setup in `x7`. reported code in `xtval` is 2.
> > > > + * b) `sspopchk` instruction finds a mismatch between top of shadow stack (ssp)
> > > > + *    and x1/x5. reported code in `xtval` is 3.
> > > > + */
> > > > +asmlinkage __visible __trap_section void do_trap_software_check(struct pt_regs *regs)
> > > > +{
> > > > +       if (user_mode(regs)) {
> > > > +               irqentry_enter_from_user_mode(regs);
> > > > +
> > > > +               /* not a cfi violation, then merge into flow of unknown trap handler */
> > > > +               if (!handle_user_cfi_violation(regs))
> > > > +                       do_trap_unknown(regs);
> > > > +
> > > > +               irqentry_exit_to_user_mode(regs);
> > > > +       } else {
> > > > +               /* sw check exception coming from kernel is a bug in kernel */
> > > > +               die(regs, "Kernel BUG");
> > > > +       }
> > > > +}
> > > > +
> > > >  #ifdef CONFIG_MMU
> > > >  asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs)
> > > >  {
> > > >
> > > > --
> > > > 2.43.0
> > > >

  reply	other threads:[~2025-07-16  2:06 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-04 17:15 [PATCH v17 00/27] riscv control-flow integrity for usermode Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 01/27] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 02/27] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 03/27] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 04/27] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 05/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 06/27] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 07/27] riscv/mm: manufacture shadow stack pte Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 08/27] riscv/mm: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 09/27] riscv/mm: write protect and shadow stack Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 10/27] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 11/27] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 12/27] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 13/27] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 14/27] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 15/27] riscv/traps: Introduce software check exception and uprobe handling Deepak Gupta
2025-06-16  7:31   ` Zong Li
2025-06-20  2:16     ` Zong Li
2025-06-20 17:33       ` Deepak Gupta
2025-07-15 21:33       ` Deepak Gupta
2025-07-16  2:06         ` Zong Li [this message]
2025-07-16  7:33           ` Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 16/27] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 17/27] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 18/27] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 19/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 20/27] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 21/27] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 22/27] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 23/27] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-06-24  7:29   ` Zong Li
2025-06-04 17:15 ` [PATCH v17 24/27] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 25/27] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 26/27] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-06-04 17:15 ` [PATCH v17 27/27] kselftest/riscv: kselftest for user mode cfi Deepak Gupta

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