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charset=UTF-8 Date: Tue, 18 Feb 2025 22:23:46 +0900 Message-Id: Subject: Re: [RFC PATCH 0/3] gpu: nova-core: add basic timer subdevice implementation From: "Alexandre Courbot" To: "Greg KH" , "Danilo Krummrich" , "David Airlie" , "John Hubbard" , "Ben Skeggs" , , , , X-Mailer: aerc 0.20.1-0-g2ecb8770224a References: <20250217-nova_timer-v1-0-78c5ace2d987@nvidia.com> <2025021830-segment-boil-5ff7@gregkh> In-Reply-To: <2025021830-segment-boil-5ff7@gregkh> X-ClientProxiedBy: TYCP301CA0087.JPNP301.PROD.OUTLOOK.COM (2603:1096:405:7b::6) To CH2PR12MB3990.namprd12.prod.outlook.com (2603:10b6:610:28::18) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PR12MB3990:EE_|SJ5PPFD525C5379:EE_ X-MS-Office365-Filtering-Correlation-Id: 5268d403-3df8-4396-e769-08dd501f7ad5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|376014|10070799003|1800799024; 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So before going further I thought it would >> > make sense to raise the most obvious questions that came to my mind >> > while writing this draft: >> >=20 >> > - Where and how to store subdevices. The timer device is currently a >> > direct member of the GPU structure. It might work for GSP devices >> > which are IIUC supposed to have at least a few fixed devices require= d >> > to bring the GSP up ; but as a general rule this probably won't scal= e >> > as not all subdevices are present on all GPU variants, or in the sam= e >> > numbers. So we will probably need to find an equivalent to the >> > `subdev` linked list in Nouveau. >> >=20 >> > - BAR sharing between subdevices. Right now each subdevice gets access >> > to the full BAR range. I am wondering whether we could not split it >> > into the relevant slices for each-subdevice, and transfer ownership = of >> > each slice to the device that is supposed to use it. That way each >> > register would have a single owner, which is arguably safer - but >> > maybe not as flexible as we will need down the road? >> >=20 >> > - On a related note, since the BAR is behind a Devres its availability >> > must first be secured before any hardware access using try_access(). >> > Doing this on a per-register or per-operation basis looks overkill, = so >> > all methods that access the BAR take a reference to it, allowing to >> > call try_access() from the highest-level caller and thus reducing th= e >> > number of times this needs to be performed. Doing so comes at the co= st >> > of an extra argument to most subdevice methods ; but also with the >> > benefit that we don't need to put the BAR behind another Arc and sha= re >> > it across all subdevices. I don't know which design is better here, >> > and input would be very welcome. >> >=20 >> > - We will probably need sometime like a `Subdevice` trait or something >> > down the road, but I'll wait until we have more than one subdevice t= o >> > think about it. >>=20 >> It might make sense to go with a full-blown aux bus. Gives you a lot of >> structures and answers to these questions, but also might be way too muc= h. > > No, it's not too much, that's exactly what the auxbus code is for > (splitting a real device into child ones where they all share the same > physical resources.) So good suggestion. Dave's comments have somehow convinced me that we probably won't need to do something as complex as I initially planned, so hopefully it won't come to that. :) But thanks for the suggestion, I'll keep it in mind just in case.