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charset=UTF-8 Date: Wed, 04 Jun 2025 13:18:37 +0900 Message-Id: From: "Alexandre Courbot" To: "Lyude Paul" , "Miguel Ojeda" , "Alex Gaynor" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , "Danilo Krummrich" , "David Airlie" , "Simona Vetter" , "Maarten Lankhorst" , "Maxime Ripard" , "Thomas Zimmermann" Cc: "John Hubbard" , "Ben Skeggs" , "Joel Fernandes" , "Timur Tabi" , "Alistair Popple" , , , , Subject: Re: [PATCH v4 17/20] gpu: nova-core: compute layout of the FRTS region X-Mailer: aerc 0.20.1-0-g2ecb8770224a References: <20250521-nova-frts-v4-0-05dfd4f39479@nvidia.com> <20250521-nova-frts-v4-17-05dfd4f39479@nvidia.com> <632966ba8231e8f3c20350b217b225301280cdd3.camel@redhat.com> In-Reply-To: <632966ba8231e8f3c20350b217b225301280cdd3.camel@redhat.com> X-ClientProxiedBy: TYWPR01CA0042.jpnprd01.prod.outlook.com (2603:1096:400:17f::13) To MN2PR12MB3997.namprd12.prod.outlook.com (2603:10b6:208:161::11) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PR12MB3990:EE_|CH3PR12MB9731:EE_ X-MS-Office365-Filtering-Correlation-Id: 1d4e78de-5b16-4a59-0cc2-08dda31ee2f0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|10070799003|1800799024|7416014|366016|921020; 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>> use crate::firmware::{Firmware, FIRMWARE_VERSION}; >> use crate::gfw; >> +use crate::gsp::fb::FbLayout; >> use crate::regs; >> use crate::util; >> use crate::vbios::Vbios; >> @@ -239,6 +240,9 @@ pub(crate) fn new( >> =20 >> let _sec2_falcon =3D Falcon::::new(pdev.as_ref(), spec.ch= ipset, bar, true)?; >> =20 >> + let fb_layout =3D FbLayout::new(spec.chipset, bar)?; >> + dev_dbg!(pdev.as_ref(), "{:#x?}\n", fb_layout); >> + >> // Will be used in a later patch when fwsec firmware is needed. >> let _bios =3D Vbios::new(pdev, bar)?; >> =20 >> diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs >> new file mode 100644 >> index 0000000000000000000000000000000000000000..27616a9d2b7069b18661fc97= 811fa1cac285b8f8 >> --- /dev/null >> +++ b/drivers/gpu/nova-core/gsp.rs >> @@ -0,0 +1,3 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> + >> +pub(crate) mod fb; >> diff --git a/drivers/gpu/nova-core/gsp/fb.rs b/drivers/gpu/nova-core/gsp= /fb.rs >> new file mode 100644 >> index 0000000000000000000000000000000000000000..e65f2619b4c03c4fa51bb24f= 3d60e8e7008e6ca5 >> --- /dev/null >> +++ b/drivers/gpu/nova-core/gsp/fb.rs >> @@ -0,0 +1,77 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> + >> +use core::ops::Range; >> + >> +use kernel::num::NumExt; >> +use kernel::prelude::*; >> + >> +use crate::driver::Bar0; >> +use crate::gpu::Chipset; >> +use crate::regs; >> + >> +mod hal; >> + >> +/// Layout of the GPU framebuffer memory. >> +/// >> +/// Contains ranges of GPU memory reserved for a given purpose during t= he GSP bootup process. >> +#[derive(Debug)] >> +#[expect(dead_code)] >> +pub(crate) struct FbLayout { >> + pub fb: Range, >> + pub vga_workspace: Range, >> + pub frts: Range, >> +} >> + >> +impl FbLayout { >> + /// Computes the FB layout. >> + pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result { >> + let hal =3D chipset.get_fb_fal(); >> + >> + let fb =3D { >> + let fb_size =3D hal.vidmem_size(bar); >> + >> + 0..fb_size >> + }; >> + >> + let vga_workspace =3D { >> + let vga_base =3D { >> + const NV_PRAMIN_SIZE: u64 =3D 0x100000; > > Don't leave those size constants out, they're getting lonely :C Not quite sure where I should put these; they are not used (for now) anywhere else, so the relevant scope is not obvious to me. Any suggestion? > >> + let base =3D fb.end - NV_PRAMIN_SIZE; >> + >> + if hal.supports_display(bar) { >> + match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).= vga_workspace_addr() { > > Considering how long register names are by default, I wonder if we should= just > be doing: > > `use crate::regs::*` > > Instead, since the NV_* makes it pretty unambiguous already. We could - I'm just a bit wary of introducing lots of (unrelated) register names into the file's namespace... Maybe we should split `regs.rs` into smaller sub-modules, e.g. `pdisp`, `pfb`, `pfalcon`, etc? > >> + Some(addr) =3D> { >> + if addr < base { >> + const VBIOS_WORKSPACE_SIZE: u64 =3D 0x2= 0000; >> + >> + // Point workspace address to end of fr= amebuffer. >> + fb.end - VBIOS_WORKSPACE_SIZE >> + } else { >> + addr >> + } >> + } >> + None =3D> base, >> + } >> + } else { >> + base >> + } >> + }; >> + >> + vga_base..fb.end >> + }; >> + >> + let frts =3D { >> + const FRTS_DOWN_ALIGN: u64 =3D 0x20000; >> + const FRTS_SIZE: u64 =3D 0x100000; >> + let frts_base =3D vga_workspace.start.align_down(FRTS_DOWN_= ALIGN) - FRTS_SIZE; >> + >> + frts_base..frts_base + FRTS_SIZE >> + }; >> + >> + Ok(Self { >> + fb, >> + vga_workspace, >> + frts, >> + }) >> + } >> +} >> diff --git a/drivers/gpu/nova-core/gsp/fb/hal.rs b/drivers/gpu/nova-core= /gsp/fb/hal.rs >> new file mode 100644 >> index 0000000000000000000000000000000000000000..9f8e777e90527026a3906116= 6c6af6257a066aca >> --- /dev/null >> +++ b/drivers/gpu/nova-core/gsp/fb/hal.rs >> @@ -0,0 +1,30 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> + >> +use crate::driver::Bar0; >> +use crate::gpu::Chipset; >> + >> +mod ga100; >> +mod ga102; >> +mod tu102; >> + >> +pub(crate) trait FbHal { >> + /// Returns `true` is display is supported. >> + fn supports_display(&self, bar: &Bar0) -> bool; >> + /// Returns the VRAM size, in bytes. >> + fn vidmem_size(&self, bar: &Bar0) -> u64; >> +} >> + >> +impl Chipset { >> + /// Returns the HAL corresponding to this chipset. >> + pub(super) fn get_fb_fal(self) -> &'static dyn FbHal { >> + use Chipset::*; >> + >> + match self { >> + TU102 | TU104 | TU106 | TU117 | TU116 =3D> tu102::TU102_HAL= , >> + GA100 =3D> ga100::GA100_HAL, >> + GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD1= 04 | AD106 | AD107 =3D> { > > Hopefully I'm not hallucinating us adding #[derive(Ordering)] or whatever= it's > called now that I'm 17 patches deep but, couldn't we use ranges here w/r/= t to > the model numbers? I wish we could, but Rust doesn't allow this yet: error[E0029]: only `char` and numeric types are allowed in range patter= ns --> drivers/gpu/nova-core/gsp/fb/hal.rs:23:13 | 23 | TU102..TU116 =3D> tu102::TU102_HAL, | -----^^----- | | | | | this is of type `Chipset` but it should be `char= ` or numeric | this is of type `Chipset` but it should be `char` or nu= meric Applying `#[repr(u32)]` on `Chipset` does not enable ranges unfortunately. > > Otherwise: > > Reviewed-by: Lyude Paul Thank you!