From: "Danilo Krummrich" <dakr@kernel.org>
To: "Greg KH" <greg@kroah.com>
Cc: "Joel Fernandes" <joelagnelf@nvidia.com>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Yury Norov" <yury.norov@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Alistair Popple" <apopple@nvidia.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"bjorn3_gh@protonmail.com" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"John Hubbard" <jhubbard@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"joel@joelfernandes.org" <joel@joelfernandes.org>,
"Elle Rhumsaa" <elle@weathered-steel.dev>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Andrea Righi" <arighi@nvidia.com>,
"nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>
Subject: Re: [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/
Date: Wed, 08 Oct 2025 12:49:54 +0200 [thread overview]
Message-ID: <DDCVS7HAHDSN.2X14HAKD13MZI@kernel.org> (raw)
In-Reply-To: <2025100808-unpadded-unsubtle-1053@gregkh>
On Wed Oct 8, 2025 at 12:47 PM CEST, Greg KH wrote:
> On Wed, Oct 08, 2025 at 12:23:40PM +0200, Danilo Krummrich wrote:
>> On Wed Oct 8, 2025 at 1:37 AM CEST, Joel Fernandes wrote:
>> > The Nvidia GPU architecture is little-endian (including MMU structures in VRAM).
>>
>> Yes, I'm aware (and I'd assume that there is no reason to ever change that).
>>
>> Just for the complete picture, there's also some endianness switch in the
>> NV_PMC_BOOT_1 register I think?
>>
>> > All the CPU architectures our drivers support are expected to be little-endian.
>>
>> Technically, all Rust supported architectures are indeed little-endian.
>
> s390x is supported by rust as a tier2 output:
> https://doc.rust-lang.org/beta/rustc/platform-support/s390x-unknown-linux-gnu.html
>
> so there really shouldn't be any reason why that platform couldn't add
> rust support today, right?
That's the one I also had in mind. :)
next prev parent reply other threads:[~2025-10-08 10:50 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-07 23:37 [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/ Joel Fernandes
2025-10-08 10:23 ` Danilo Krummrich
2025-10-08 10:47 ` Greg KH
2025-10-08 10:49 ` Danilo Krummrich [this message]
2025-10-09 0:24 ` Joel Fernandes
2025-10-09 13:02 ` Danilo Krummrich
-- strict thread matches above, loose matches on Subject: below --
2025-10-08 19:56 Joel Fernandes
2025-10-03 15:47 Joel Fernandes
2025-10-06 18:05 ` Edwin Peer
2025-10-06 22:29 ` Yury Norov
2025-10-07 10:36 ` Alexandre Courbot
2025-10-07 10:42 ` Miguel Ojeda
2025-10-07 13:20 ` Alexandre Courbot
2025-10-07 16:06 ` Yury Norov
2025-10-07 16:12 ` Miguel Ojeda
2025-10-07 13:16 ` Danilo Krummrich
2025-10-07 21:08 ` Joel Fernandes
2025-10-07 22:08 ` Danilo Krummrich
2025-10-08 14:28 ` Yury Norov
2025-10-08 15:00 ` Danilo Krummrich
2025-10-07 15:41 ` Yury Norov
2025-10-07 21:41 ` Daniel Almeida
2025-10-08 15:49 ` Yury Norov
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