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From: "Danilo Krummrich" <dakr@kernel.org>
To: "Alistair Popple" <apopple@nvidia.com>
Cc: rust-for-linux@vger.kernel.org, dri-devel@lists.freedesktop.org,
	acourbot@nvidia.com, "Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>,
	linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org
Subject: Re: [PATCH v4 02/13] gpu: nova-core: Create initial Gsp
Date: Wed, 08 Oct 2025 18:01:50 +0200	[thread overview]
Message-ID: <DDD2F1NSSTVN.1VDRSX5O9ZIKM@kernel.org> (raw)
In-Reply-To: <20251008001253.437911-3-apopple@nvidia.com>

On Wed Oct 8, 2025 at 2:12 AM CEST, Alistair Popple wrote:
> diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs
> index 221281da1a45..63099df77348 100644
> --- a/drivers/gpu/nova-core/gsp.rs
> +++ b/drivers/gpu/nova-core/gsp.rs
> @@ -2,25 +2,94 @@
>  
>  mod boot;
>  
> +use kernel::device;
> +use kernel::dma::CoherentAllocation;
> +use kernel::dma::DmaAddress;
> +use kernel::dma_write;
> +use kernel::pci;
>  use kernel::prelude::*;
>  use kernel::ptr::Alignment;
> +use kernel::transmute::AsBytes;
>  
>  pub(crate) use fw::{GspFwWprMeta, LibosParams};
>  
>  mod fw;
>  
> +use fw::LibosMemoryRegionInitArgument;
> +
>  pub(crate) const GSP_PAGE_SHIFT: usize = 12;
>  pub(crate) const GSP_PAGE_SIZE: usize = 1 << GSP_PAGE_SHIFT;
>  pub(crate) const GSP_HEAP_ALIGNMENT: Alignment = Alignment::new::<{ 1 << 20 }>();

This looks like it could depend on the firmware version in the future, hence it
should probably defined somewhere in fw/ with a corresponding comment. The
actual version switch is fine to omit for now of course (we agreed to add the
infrastructure for the version switch subsequently).

> +/// Number of GSP pages to use in a RM log buffer.
> +const RM_LOG_BUFFER_NUM_PAGES: usize = 0x10;

Why 0x10? Is there a specific reason?

> +
>  /// GSP runtime data.
> -///
> -/// This is an empty pinned placeholder for now.
>  #[pin_data]
> -pub(crate) struct Gsp {}
> +pub(crate) struct Gsp {
> +    libos: CoherentAllocation<LibosMemoryRegionInitArgument>,
> +    pub loginit: CoherentAllocation<u8>,
> +    pub logintr: CoherentAllocation<u8>,
> +    pub logrm: CoherentAllocation<u8>,

This creates warnings for older compiler version, please use pub(crate) instead.

> +}
> +
> +#[repr(C)]
> +struct PteArray<const NUM_ENTRIES: usize>([u64; NUM_ENTRIES]);
> +/// SAFETY: arrays of `u64` implement `AsBytes` and we are but a wrapper around it.
> +unsafe impl<const NUM_ENTRIES: usize> AsBytes for PteArray<NUM_ENTRIES> {}

Please separate struct definitions and impl blocks with an empty line.

> +impl<const NUM_PAGES: usize> PteArray<NUM_PAGES> {
> +    fn new(handle: DmaAddress) -> Self {

No check that NUM_PAGES actually fits the size of the DMA buffer handle passed
in? What happens if they do not match?

> +        let mut ptes = [0u64; NUM_PAGES];
> +        for (i, pte) in ptes.iter_mut().enumerate() {
> +            *pte = handle + ((i as u64) << GSP_PAGE_SHIFT);

I think this should be handle.checked_add(). Additionally we should add the
following compile time check to make sure that the shift can never overflow:

	const _MAX_OFFSET: usize = NUM_PAGES << GSP_PAGE_SHIFT;

> +        }
> +
> +        Self(ptes)
> +    }
> +}
> +
> +/// Creates a new `CoherentAllocation<A>` with `name` of `size` elements, and
> +/// register it into the `libos` object at argument position `libos_arg_nr`.
> +fn create_logbuffer_dma_object(
> +    dev: &device::Device<device::Bound>,
> +) -> Result<CoherentAllocation<u8>> {
> +    let mut obj = CoherentAllocation::<u8>::alloc_coherent(
> +        dev,
> +        RM_LOG_BUFFER_NUM_PAGES * GSP_PAGE_SIZE,
> +        GFP_KERNEL | __GFP_ZERO,
> +    )?;
> +    let ptes = PteArray::<RM_LOG_BUFFER_NUM_PAGES>::new(obj.dma_handle());
> +
> +    // SAFETY: `obj` has just been created and we are its sole user.
> +    unsafe {
> +        // Copy the self-mapping PTE at the expected location.
> +        obj.as_slice_mut(size_of::<u64>(), size_of_val(&ptes))?
> +            .copy_from_slice(ptes.as_bytes())
> +    };
> +
> +    Ok(obj)
> +}

I think we should just create a new gsp::Logbuffer type for this rather than
have a function as object constructor.

>  
>  impl Gsp {
> -    pub(crate) fn new() -> impl PinInit<Self> {
> -        pin_init!(Self {})
> +    pub(crate) fn new(pdev: &pci::Device<device::Bound>) -> Result<impl PinInit<Self, Error>> {
> +        let dev = pdev.as_ref();
> +        let libos = CoherentAllocation::<LibosMemoryRegionInitArgument>::alloc_coherent(
> +            dev,
> +            GSP_PAGE_SIZE / size_of::<LibosMemoryRegionInitArgument>(),
> +            GFP_KERNEL | __GFP_ZERO,
> +        )?;
> +        let loginit = create_logbuffer_dma_object(dev)?;
> +        dma_write!(libos[0] = LibosMemoryRegionInitArgument::new("LOGINIT", &loginit))?;
> +        let logintr = create_logbuffer_dma_object(dev)?;
> +        dma_write!(libos[1] = LibosMemoryRegionInitArgument::new("LOGINTR", &logintr))?;
> +        let logrm = create_logbuffer_dma_object(dev)?;
> +        dma_write!(libos[2] = LibosMemoryRegionInitArgument::new("LOGRM", &logrm))?;
> +
> +        Ok(try_pin_init!(Self {
> +            libos,
> +            loginit,
> +            logintr,
> +            logrm,
> +        }))
>      }
>  }
> diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
> index 181baa401770..dd1e7fc85d85 100644
> --- a/drivers/gpu/nova-core/gsp/fw.rs
> +++ b/drivers/gpu/nova-core/gsp/fw.rs
> @@ -7,8 +7,10 @@
>  
>  use core::ops::Range;
>  
> +use kernel::dma::CoherentAllocation;
>  use kernel::ptr::Alignable;
>  use kernel::sizes::SZ_1M;
> +use kernel::transmute::{AsBytes, FromBytes};
>  
>  use crate::gpu::Chipset;
>  use crate::gsp;
> @@ -99,3 +101,40 @@ pub(crate) fn wpr_heap_size(&self, chipset: Chipset, fb_size: u64) -> u64 {
>  /// addresses of the GSP bootloader and firmware.
>  #[repr(transparent)]
>  pub(crate) struct GspFwWprMeta(bindings::GspFwWprMeta);
> +
> +#[repr(transparent)]
> +pub(crate) struct LibosMemoryRegionInitArgument(bindings::LibosMemoryRegionInitArgument);

Please add some documentation for the type.

> +
> +// SAFETY: Padding is explicit and will not contain uninitialized data.
> +unsafe impl AsBytes for LibosMemoryRegionInitArgument {}
> +
> +// SAFETY: This struct only contains integer types for which all bit patterns
> +// are valid.
> +unsafe impl FromBytes for LibosMemoryRegionInitArgument {}
> +
> +impl LibosMemoryRegionInitArgument {
> +    pub(crate) fn new<A: AsBytes + FromBytes>(
> +        name: &'static str,
> +        obj: &CoherentAllocation<A>,
> +    ) -> Self {
> +        /// Generates the `ID8` identifier required for some GSP objects.
> +        fn id8(name: &str) -> u64 {
> +            let mut bytes = [0u8; core::mem::size_of::<u64>()];
> +
> +            for (c, b) in name.bytes().rev().zip(&mut bytes) {
> +                *b = c;
> +            }
> +
> +            u64::from_ne_bytes(bytes)
> +        }
> +
> +        Self(bindings::LibosMemoryRegionInitArgument {
> +            id8: id8(name),
> +            pa: obj.dma_handle(),
> +            size: obj.size() as u64,
> +            kind: bindings::LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONTIGUOUS as u8,
> +            loc: bindings::LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SYSMEM as u8,

Please prefer into() if possible.

  reply	other threads:[~2025-10-08 16:01 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-08  0:12 [PATCH v4 00/13] gpu: nova-core: Boot GSP to RISC-V active Alistair Popple
2025-10-08  0:12 ` [PATCH v4 01/13] gpu: nova-core: Set correct DMA mask Alistair Popple
2025-10-08 10:30   ` Danilo Krummrich
2025-10-08 22:34     ` Alistair Popple
2025-10-08  0:12 ` [PATCH v4 02/13] gpu: nova-core: Create initial Gsp Alistair Popple
2025-10-08 16:01   ` Danilo Krummrich [this message]
2025-10-09  1:14     ` Alistair Popple
2025-10-08  0:12 ` [PATCH v4 03/13] gpu: nova-core: gsp: Create wpr metadata Alistair Popple
2025-10-08 16:11   ` Danilo Krummrich
2025-10-08  0:12 ` [PATCH v4 04/13] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure Alistair Popple
2025-10-08 16:41   ` Danilo Krummrich
2025-10-09  1:29     ` Alistair Popple
2025-10-08 16:56   ` Miguel Ojeda
2025-10-09 21:41     ` Joel Fernandes
2025-10-08  0:12 ` [PATCH v4 05/13] gpu: nova-core: Add GSP command queue bindings Alistair Popple
2025-10-08  0:12 ` [PATCH v4 06/13] gpu: nova-core: gsp: Add GSP command queue handling Alistair Popple
2025-10-08  0:12 ` [PATCH v4 07/13] gpu: nova-core: gsp: Create rmargs Alistair Popple
2025-10-08  0:12 ` [PATCH v4 08/13] gpu: nova-core: Add bindings and accessors for GspSystemInfo Alistair Popple
2025-10-08  0:12 ` [PATCH v4 09/13] gpu: nova-core: Add bindings for the GSP RM registry tables Alistair Popple
2025-10-08  0:12 ` [PATCH v4 10/13] gpu: nova-core: gsp: Create RM registry and sysinfo commands Alistair Popple
2025-10-08  0:12 ` [PATCH v4 11/13] nova-core: falcon: Add support to check if RISC-V is active Alistair Popple
2025-10-08  0:12 ` [PATCH v4 12/13] nova-core: falcon: Add support to write firmware version Alistair Popple
2025-10-08  3:21   ` Timur Tabi
2025-10-08  4:56     ` Joel Fernandes
2025-10-08  5:16     ` Alistair Popple
2025-10-08  0:12 ` [PATCH v4 13/13] nova-core: gsp: Boot GSP Alistair Popple
2025-10-08 10:38 ` [PATCH v4 00/13] gpu: nova-core: Boot GSP to RISC-V active Danilo Krummrich
2025-10-08 10:41   ` Danilo Krummrich
2025-10-08 22:21     ` Alistair Popple

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