From: "Danilo Krummrich" <dakr@kernel.org>
To: "Joel Fernandes" <joelagnelf@nvidia.com>
Cc: "Alexandre Courbot" <acourbot@nvidia.com>,
"Yury Norov" <yury.norov@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Alistair Popple" <apopple@nvidia.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"bjorn3_gh@protonmail.com" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"John Hubbard" <jhubbard@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"joel@joelfernandes.org" <joel@joelfernandes.org>,
"Elle Rhumsaa" <elle@weathered-steel.dev>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Andrea Righi" <arighi@nvidia.com>,
"nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>
Subject: Re: [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/
Date: Thu, 09 Oct 2025 15:02:39 +0200 [thread overview]
Message-ID: <DDDT8EEG7E8B.27YT6QAFIS9GK@kernel.org> (raw)
In-Reply-To: <22e8c33c-b444-4f58-b7ec-6374475e05be@nvidia.com>
On Thu Oct 9, 2025 at 2:24 AM CEST, Joel Fernandes wrote:
> On 10/8/2025 6:23 AM, Danilo Krummrich wrote:
>> On Wed Oct 8, 2025 at 1:37 AM CEST, Joel Fernandes wrote:
>>> The Nvidia GPU architecture is little-endian (including MMU structures in VRAM).
>>
>> Yes, I'm aware (and I'd assume that there is no reason to ever change that).
>>
>> Just for the complete picture, there's also some endianness switch in the
>> NV_PMC_BOOT_1 register I think?
>
> You are referring to old GPUs. NV_PMC_BOOT_1 does not have endianness switch for
> Turing and later.
Ok, then there's no point in considering big-endian CPUs.
> If we want to add a Kconfig patch enabling Nova only on x86/ARM, that'll be Ok
> with me.
I don't see why we'd constrain it to x86 and ARM, but we should indeed constrain
it to little-endian architectures.
next prev parent reply other threads:[~2025-10-09 13:02 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-07 23:37 [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/ Joel Fernandes
2025-10-08 10:23 ` Danilo Krummrich
2025-10-08 10:47 ` Greg KH
2025-10-08 10:49 ` Danilo Krummrich
2025-10-09 0:24 ` Joel Fernandes
2025-10-09 13:02 ` Danilo Krummrich [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-10-08 19:56 Joel Fernandes
2025-10-03 15:47 Joel Fernandes
2025-10-06 18:05 ` Edwin Peer
2025-10-06 22:29 ` Yury Norov
2025-10-07 10:36 ` Alexandre Courbot
2025-10-07 10:42 ` Miguel Ojeda
2025-10-07 13:20 ` Alexandre Courbot
2025-10-07 16:06 ` Yury Norov
2025-10-07 16:12 ` Miguel Ojeda
2025-10-07 13:16 ` Danilo Krummrich
2025-10-07 21:08 ` Joel Fernandes
2025-10-07 22:08 ` Danilo Krummrich
2025-10-08 14:28 ` Yury Norov
2025-10-08 15:00 ` Danilo Krummrich
2025-10-07 15:41 ` Yury Norov
2025-10-07 21:41 ` Daniel Almeida
2025-10-08 15:49 ` Yury Norov
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