From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 640611F2BAD; Fri, 31 Oct 2025 12:50:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761915016; cv=none; b=jg7fPPlNXaDK1ef5NT0oPT+vVGud/b2R+YQ8XJB2mBvk5xsTtWNrH9GZtb2TgyhWPNVqx+1Jldr6eSpqUJfb7uX/CnNg5nL7Q1SsizhMZ99c1h9tjQNmDvWb79IGnVXbLttilTte2HkxhtbiGKOhy0ScHxCfapYmQ5jYPVbzul0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761915016; c=relaxed/simple; bh=OTjMDonvY6N5Z54OL6u4Od3iceOioJU+g1NjtVl5uFk=; h=Mime-Version:Content-Type:Date:Message-Id:Subject:Cc:To:From: References:In-Reply-To; b=PkyQDSddzFninmXQMlSb1pM7Zo0QMQqHasdQfxryUblg2cG+ww4xggwdgcinBL6F9FwReAGOjz5JjGaczqfucJveppJw5p/xARO0Czy54iLE1nBu70aWGal+7XMSHuTtpAw/5Q6CTnxItM2fS1tEaupFmFKQS42xPvmRucgw7Q8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QbVfHkxE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QbVfHkxE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3FCB5C4CEF8; Fri, 31 Oct 2025 12:50:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761915015; bh=OTjMDonvY6N5Z54OL6u4Od3iceOioJU+g1NjtVl5uFk=; h=Date:Subject:Cc:To:From:References:In-Reply-To:From; b=QbVfHkxEsw0CFRDYYeok+4QQje3dJ74Vlb8o0Fti5K+lzLBGo2vAXLWxR4WT7oSU/ qOYFddIi1vM7RsQ8eeY6ID7fVTno7+rugujGswtMPmOjwj6OYp6H8olJZqmX8/AJmz pqquFGiN09WPuSQ2OrQpSwoHtSRSIO6PU7JAN6e+0UmPCLf8NuYmuVUVLGjwCEjOAE 6FOYBGq2ViCmS3NgRqw5APXzRxIhrVdkdPEdTsZ09hrV95ns8GM1dybmVXqaeNN7gQ ag571KuNbgsnapvispXqXkbpZqdNpDkkWOkP/RRooez9YwZzEgE70GxYtNkClN40qQ LVyf2Qv4sDbSw== Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 31 Oct 2025 13:50:09 +0100 Message-Id: Subject: Re: [PATCH v3 5/5] sample: rust: pci: add tests for config space routines Cc: , , , , , , , , , , , , , , , , , , , , , , , , To: "Zhi Wang" From: "Danilo Krummrich" References: <20251030154842.450518-1-zhiw@nvidia.com> <20251030154842.450518-6-zhiw@nvidia.com> In-Reply-To: <20251030154842.450518-6-zhiw@nvidia.com> On Thu Oct 30, 2025 at 4:48 PM CET, Zhi Wang wrote: > + fn config_space(pdev: &pci::Device) -> Result { > + let config =3D pdev.config_space()?; > + > + dev_info!( > + pdev.as_ref(), > + "pci-testdev config space try_read8 rev ID: {:x}\n", > + config.try_read8(0x8)? > + ); > + > + dev_info!( > + pdev.as_ref(), > + "pci-testdev config space try_read16 vendor ID: {:x}\n", > + config.try_read16(0)? > + ); > + > + dev_info!( > + pdev.as_ref(), > + "pci-testdev config space try_read32 BAR 0: {:x}\n", > + config.try_read32(0x10)? > + ); > + > + Ok(()) > + } > } Please use the infallible accessors and add a TODO to use the register!() m= acro for defining PCI configuration space registers once it has been move out of nova-core.