From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Timur Tabi" <ttabi@nvidia.com>,
"Danilo Krummrich" <dakr@kernel.org>,
"Lyude Paul" <lyude@redhat.com>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"John Hubbard" <jhubbard@nvidia.com>,
<nouveau@lists.freedesktop.org>, <rust-for-linux@vger.kernel.org>,
"Joel Fernandes" <joelagnelf@nvidia.com>
Cc: "Nouveau" <nouveau-bounces@lists.freedesktop.org>
Subject: Re: [PATCH 02/11] gpu: nova-core: add ImemNs section infrastructure
Date: Wed, 19 Nov 2025 10:54:23 +0900 [thread overview]
Message-ID: <DECAP2MZ5DUU.1SLMSVDB3GU1T@nvidia.com> (raw)
In-Reply-To: <20251114233045.2512853-3-ttabi@nvidia.com>
On Sat Nov 15, 2025 at 8:30 AM JST, Timur Tabi wrote:
> The GSP booter firmware in Turing and GA100 includes a third memory
> section called ImemNs, which is non-secure IMEM. This section must
> be loaded separately from DMEM and secure IMEM, but only if it
> actually exists.
>
> Signed-off-by: Timur Tabi <ttabi@nvidia.com>
> ---
> drivers/gpu/nova-core/falcon.rs | 18 ++++++++++++++++--
> drivers/gpu/nova-core/firmware/booter.rs | 9 +++++++++
> drivers/gpu/nova-core/firmware/fwsec.rs | 5 +++++
> 3 files changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
> index 0e0935dbb927..ece8b92a627e 100644
> --- a/drivers/gpu/nova-core/falcon.rs
> +++ b/drivers/gpu/nova-core/falcon.rs
> @@ -239,6 +239,8 @@ fn from(value: PeregrineCoreSelect) -> Self {
> pub(crate) enum FalconMem {
> /// Secure Instruction Memory.
> ImemSec,
> + /// Non-Secure Instruction Memory.
> + ImemNs,
So, seeing how this is taking shape I now think we should just have one
Imem variant:
Imem { secure: bool },
This makes matching easier for the common case of "we want to do
something in case of Imem, regardless of the secure flag". Something
like
FalconMem::ImemSec | FalconMem::ImemNs => {
becomes:
FalconMem::Imem { .. } => {
And if you need to use the flag, you can change e.g.:
FalconMem::ImemSec | FalconMem::ImemNs => {
regs::NV_PFALCON_FALCON_IMEMC::default()
.set_secure(target_mem == FalconMem::ImemSec)
into
FalconMem::Imem { secure } => {
regs::NV_PFALCON_FALCON_IMEMC::default()
.set_secure(secure)
Which is simpler and easier to read.
This also removes the need to rename `Imem` into `ImemSec`, so the first
two patches can be merged into one.
next prev parent reply other threads:[~2025-11-19 1:54 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 23:30 [PATCH 00/11] gpu: nova-core: add Turing support Timur Tabi
2025-11-14 23:30 ` [PATCH 01/11] gpu: nova-core: rename Imem to ImemSec Timur Tabi
2025-11-17 22:50 ` Lyude Paul
2025-11-14 23:30 ` [PATCH 02/11] gpu: nova-core: add ImemNs section infrastructure Timur Tabi
2025-11-17 23:19 ` Lyude Paul
2025-11-19 1:54 ` Alexandre Courbot [this message]
2025-11-19 6:30 ` John Hubbard
2025-11-19 6:55 ` Alexandre Courbot
2025-11-19 19:54 ` Timur Tabi
2025-11-19 20:34 ` Joel Fernandes
2025-11-19 20:45 ` Timur Tabi
2025-11-19 20:54 ` John Hubbard
2025-11-19 20:56 ` Timur Tabi
2025-11-20 1:45 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 03/11] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-11-17 22:33 ` Joel Fernandes
2025-11-18 0:52 ` Timur Tabi
2025-11-18 1:04 ` Joel Fernandes
2025-11-18 1:06 ` Timur Tabi
2025-11-18 1:15 ` John Hubbard
2025-11-18 1:29 ` John Hubbard
2025-11-18 1:12 ` John Hubbard
2025-11-18 19:42 ` Joel Fernandes
2025-11-19 2:51 ` Alexandre Courbot
2025-11-19 5:16 ` Timur Tabi
2025-11-19 7:03 ` Alexandre Courbot
2025-11-19 7:04 ` John Hubbard
2025-11-19 20:10 ` Joel Fernandes
2025-11-14 23:30 ` [PATCH 04/11] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-11-17 23:20 ` Lyude Paul
2025-11-19 2:59 ` Alexandre Courbot
2025-11-19 5:17 ` Timur Tabi
2025-11-19 7:11 ` Alexandre Courbot
2025-11-19 7:17 ` John Hubbard
2025-11-19 7:34 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 05/11] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-11-19 3:04 ` Alexandre Courbot
2025-11-19 6:32 ` John Hubbard
2025-11-14 23:30 ` [PATCH 06/11] gpu: nova-core: add Turing boot registers Timur Tabi
2025-11-17 22:41 ` Joel Fernandes
2025-11-19 2:17 ` Alexandre Courbot
2025-11-19 6:34 ` John Hubbard
2025-11-19 6:47 ` Alexandre Courbot
2025-11-19 6:51 ` John Hubbard
2025-11-19 7:15 ` Alexandre Courbot
2025-11-19 7:24 ` John Hubbard
2025-11-19 19:10 ` Timur Tabi
2025-11-20 1:41 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 07/11] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-11-14 23:30 ` [PATCH 08/11] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-11-18 0:50 ` Joel Fernandes
2025-11-19 3:11 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 09/11] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-11-17 23:10 ` Joel Fernandes
2025-11-18 13:04 ` Alexandre Courbot
2025-11-18 15:08 ` Timur Tabi
2025-11-18 19:46 ` Joel Fernandes
2025-11-19 1:36 ` Alexandre Courbot
2025-11-18 19:45 ` Joel Fernandes
2025-11-19 6:40 ` John Hubbard
2025-11-19 3:27 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 10/11] gpu: nova-core: LibosMemoryRegionInitArgument size must be page aligned Timur Tabi
2025-11-19 3:36 ` Alexandre Courbot
2025-11-14 23:30 ` [PATCH 11/11] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-11-17 23:34 ` Joel Fernandes
2025-11-18 13:08 ` Alexandre Courbot
2025-11-19 4:28 ` Alexandre Courbot
2025-11-19 13:49 ` Alexandre Courbot
2025-11-19 7:01 ` Alexandre Courbot
2025-11-19 4:29 ` [PATCH 00/11] gpu: nova-core: add Turing support Alexandre Courbot
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