rust-for-linux.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Timur Tabi" <ttabi@nvidia.com>,
	"Alexandre Courbot" <acourbot@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Lyude Paul" <lyude@redhat.com>, <nouveau@lists.freedesktop.org>,
	<rust-for-linux@vger.kernel.org>
Cc: "Nouveau" <nouveau-bounces@lists.freedesktop.org>
Subject: Re: [PATCH v3 11/12] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size
Date: Wed, 17 Dec 2025 16:17:55 +0900	[thread overview]
Message-ID: <DF0B41FU249U.1TCM73282SDFJ@nvidia.com> (raw)
In-Reply-To: <20251208231801.1786803-12-ttabi@nvidia.com>

On Tue Dec 9, 2025 at 8:18 AM JST, Timur Tabi wrote:
> On Turing and GA100 (i.e. the versions that use Libos v2), GSP-RM insists
> that the 'size' parameter of the LibosMemoryRegionInitArgument struct be
> aligned to 4KB.  The logging buffers are already aligned to that size, so
> only the GSP_ARGUMENTS_CACHED struct needs to be adjusted.  Make that
> adjustment by adding padding to the end of the struct.
>
> Signed-off-by: Timur Tabi <ttabi@nvidia.com>
> ---
>  drivers/gpu/nova-core/gsp/fw.rs | 24 +++++++++++++++++-------
>  1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
> index abffd6beec65..6f53df0f6f3d 100644
> --- a/drivers/gpu/nova-core/gsp/fw.rs
> +++ b/drivers/gpu/nova-core/gsp/fw.rs
> @@ -889,17 +889,27 @@ unsafe impl AsBytes for GspMsgElement {}
>  unsafe impl FromBytes for GspMsgElement {}
>  
>  /// Arguments for GSP startup.
> -#[repr(transparent)]
> -pub(crate) struct GspArgumentsCached(bindings::GSP_ARGUMENTS_CACHED);
> +///
> +/// On Turing and GA100, the entries in the `LibosMemoryRegionInitArgument`
> +/// must all be a multiple of GSP_PAGE_SIZE in size, so add padding to force it
> +/// to that size.
> +#[repr(C)]
> +pub(crate) struct GspArgumentsCached(
> +    bindings::GSP_ARGUMENTS_CACHED,
> +    [u8; GSP_PAGE_SIZE - core::mem::size_of::<bindings::GSP_ARGUMENTS_CACHED>()],
> +);
>  
>  impl GspArgumentsCached {
>      /// Creates the arguments for starting the GSP up using `cmdq` as its command queue.
>      pub(crate) fn new(cmdq: &Cmdq) -> Self {
> -        Self(bindings::GSP_ARGUMENTS_CACHED {
> -            messageQueueInitArguments: MessageQueueInitArguments::new(cmdq).0,
> -            bDmemStack: 1,
> -            ..Default::default()
> -        })
> +        Self(
> +            bindings::GSP_ARGUMENTS_CACHED {
> +                messageQueueInitArguments: MessageQueueInitArguments::new(cmdq).0,
> +                bDmemStack: 1,
> +                ..Default::default()
> +            },
> +            [0u8; GSP_PAGE_SIZE - core::mem::size_of::<bindings::GSP_ARGUMENTS_CACHED>()]

You can use `Zeroable::zeroed()` instead of this last complex line.

  reply	other threads:[~2025-12-17  7:18 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-08 23:17 [PATCH v3 00/12] gpu: nova-core: add Turing support Timur Tabi
2025-12-08 23:17 ` [PATCH v3 01/12] gpu: nova-core: rename Imem to ImemSecure Timur Tabi
2025-12-08 23:17 ` [PATCH v3 02/12] gpu: nova-core: add ImemNonSecure section infrastructure Timur Tabi
2025-12-08 23:17 ` [PATCH v3 03/12] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-12-17  6:23   ` Alexandre Courbot
2025-12-08 23:17 ` [PATCH v3 04/12] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-12-17  6:27   ` Alexandre Courbot
2025-12-08 23:17 ` [PATCH v3 05/12] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-12-08 23:17 ` [PATCH v3 06/12] gpu: nova-core: add Turing boot registers Timur Tabi
2025-12-17  6:36   ` Alexandre Courbot
2025-12-08 23:17 ` [PATCH v3 07/12] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-12-08 23:17 ` [PATCH v3 08/12] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-12-17  6:40   ` Alexandre Courbot
2025-12-08 23:17 ` [PATCH v3 09/12] gpu: nova-core: add Falcon HAL method supports_dma() Timur Tabi
2025-12-08 23:17 ` [PATCH v3 10/12] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-12-08 23:18 ` [PATCH v3 11/12] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size Timur Tabi
2025-12-17  7:17   ` Alexandre Courbot [this message]
2025-12-08 23:18 ` [PATCH v3 12/12] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-12-17  6:37 ` [PATCH v3 00/12] gpu: nova-core: add Turing support Alexandre Courbot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DF0B41FU249U.1TCM73282SDFJ@nvidia.com \
    --to=acourbot@nvidia.com \
    --cc=dakr@kernel.org \
    --cc=jhubbard@nvidia.com \
    --cc=joelagnelf@nvidia.com \
    --cc=lyude@redhat.com \
    --cc=nouveau-bounces@lists.freedesktop.org \
    --cc=nouveau@lists.freedesktop.org \
    --cc=rust-for-linux@vger.kernel.org \
    --cc=ttabi@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).